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10 Commits
beta06_4ax
...
beta08_4ax
Author | SHA1 | Date | |
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92b093ee43 | |||
5ad7af8dfb | |||
96ad0afdda | |||
4252f75a84 | |||
dc92bf565e | |||
436615095f | |||
f904fff7ba | |||
b24e01d588 | |||
ba4e83723f | |||
eeb206ec97 |
@ -34,7 +34,7 @@ Build notes:
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* Install the ARM embeded toolchain (see https://developer.arm.com/open-source/gnu-toolchain/gnu-rm/downloads)
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* Include ```make``` and the ```arm-none-eabi-*``` tools in your path.
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* Run ```git submodule init``` and ```git submodule update``` before building.
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* Make produces 2 files:
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* ```make``` produces 2 files:
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* ```build/firmware.bin```: this is compatible with the sdcard bootloader.
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* ```build/grbl.hex```: this is not compatible with the sdcard bootloader. It loads using Flash Magic
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and is primarilly for developers who don't want to keep swapping sdcards. If you flash this,
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@ -38,6 +38,9 @@
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//#define CPU_MAP_MKS_SBASE // MKS SBASE Board (NXP LPC1768 MCU)
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//#define CPU_MAP_AZTEEG_X5 // Azteeg X5 Board (NXP LPC1769 MCU)
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// Force Spincle PWM Pin 2.4 (default is P2.5)
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//#define SPINDLE_PWM_PIN_2_4
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// Define machine type for machine specific defaults
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//#define DEFAULTS_GENERIC
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#define DEFAULTS_K40
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@ -136,7 +139,7 @@
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// #define HOMING_FORCE_SET_ORIGIN // Uncomment to enable.
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// Uncomment this define to force Grbl to always set the machine origin at bottom left.
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//#define HOMING_FORCE_POSITIVE_SPACE // Uncomment to enable.
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#define HOMING_FORCE_POSITIVE_SPACE // Uncomment to enable.
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// Number of blocks Grbl executes upon startup. These blocks are stored in EEPROM, where the size
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// and addresses are defined in settings.h. With the current settings, up to 2 startup blocks may
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@ -176,7 +179,7 @@
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// Enables a second coolant control pin via the mist coolant g-code command M7 on the Arduino Uno
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// analog pin 4. Only use this option if you require a second coolant control pin.
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// NOTE: The M8 flood coolant control pin on analog pin 3 will still be functional regardless.
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// #define ENABLE_M7 // Disabled by default. Uncomment to enable.
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//#define ENABLE_M7 // Disabled by default. Uncomment to enable.
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// This option causes the feed hold input to act as a safety door switch. A safety door, when triggered,
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// immediately forces a feed hold and then safely de-energizes the machine. Resuming is blocked until
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@ -196,7 +199,7 @@
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// defined at (http://corexy.com/theory.html). Motors are assumed to positioned and wired exactly as
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// described, if not, motions may move in strange directions. Grbl requires the CoreXY A and B motors
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// have the same steps per mm internally.
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// #define COREXY // Default disabled. Uncomment to enable.
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//#define COREXY // Default disabled. Uncomment to enable.
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// Inverts pin logic of the control command pins based on a mask. This essentially means you can use
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// normally-closed switches on the specified pins, rather than the default normally-open switches.
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@ -569,7 +572,7 @@
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// LPC176x flash blocks have a rating of 10,000 write cycles. To prevent excess wear, we don't
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// write G10, G28.1, and G30.1. Uncomment to enable these writes.
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// #define STORE_COORD_DATA // Default disabled. Uncomment to enable.
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#define STORE_COORD_DATA // Default disabled. Uncomment to enable.
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// In Grbl v0.9 and prior, there is an old outstanding bug where the `WPos:` work position reported
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// may not correlate to what is executing, because `WPos:` is based on the g-code parser state, which
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107
grbl/cpu_map.h
107
grbl/cpu_map.h
@ -190,17 +190,18 @@
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#define LIMIT_PORT LPC_GPIO1->FIOPIN
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#define X_LIMIT_BIT 24 // X-MIN=24, X-MAX=25
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#define Y_LIMIT_BIT 26 // Y-MIN=26, Y-MAX=27
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#define Z_LIMIT_BIT 29 // Z-MIN=28, Z-MAX=29
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#define A_LIMIT_BIT 28 // reuse p1.28, as z-min is not often used
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#define Z_LIMIT_BIT 28 // Z-MIN=28, Z-MAX=29
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#define A_LIMIT_BIT 29 // reuse p1.29
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#define LIMIT_MASK ((1<<X_LIMIT_BIT)|(1<<Y_LIMIT_BIT)|(1<<Z_LIMIT_BIT)|(1<<A_LIMIT_BIT)) // All limit bits
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// Define flood and mist coolant enable output pins.
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#define COOLANT_FLOOD_DDR NotUsed
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#define COOLANT_FLOOD_PORT NotUsed
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#define COOLANT_FLOOD_BIT 3 // Uno Analog Pin 3
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#define COOLANT_MIST_DDR NotUsed
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#define COOLANT_MIST_PORT NotUsed
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#define COOLANT_MIST_BIT 4 // Uno Analog Pin 3
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#define COOLANT_FLOOD_DDR LPC_GPIO2->FIODIR
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#define COOLANT_FLOOD_PORT LPC_GPIO2->FIOPIN
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#define COOLANT_FLOOD_BIT 4 // SMALL MOSFET Q8 (P2.4)
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#define COOLANT_MIST_DDR LPC_GPIO2->FIODIR
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#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
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#define COOLANT_MIST_BIT 6 // SMALL MOSFET Q9 (P2.6)
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#define ENABLE_M7 // enables COOLANT MIST
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// Define user-control controls (cycle start, reset, feed hold) input pins.
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// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
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@ -229,7 +230,11 @@
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// PWM Channel PWM1_CH1 PWM1_CH2 PWM1_CH3 PWM1_CH4 PWM1_CH5 PWM1_CH6
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// Primary pin P1.18 P1.20 P1.21 P1.23 P1.24 P1.26
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// Secondary pin P2.0 P2.1 P2.2 P2.3 P2.4 P2.5
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#define SPINDLE_PWM_CHANNEL PWM1_CH6
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#ifdef SPINDLE_PWM_PIN_2_4
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#define SPINDLE_PWM_CHANNEL PWM1_CH5 // MOSFET3 (P2.4)
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#else
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#define SPINDLE_PWM_CHANNEL PWM1_CH6 // BED MOSFET (P2.5)
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#endif
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#define SPINDLE_PWM_USE_PRIMARY_PIN false
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#define SPINDLE_PWM_USE_SECONDARY_PIN true
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@ -299,12 +304,13 @@
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#define LIMIT_MASK ((1<<X_LIMIT_BIT)|(1<<Y_LIMIT_BIT)|(1<<Z_LIMIT_BIT)|(1<<A_LIMIT_BIT)) // All limit bits
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// Define flood and mist coolant enable output pins.
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#define COOLANT_FLOOD_DDR NotUsed
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#define COOLANT_FLOOD_PORT NotUsed
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#define COOLANT_FLOOD_BIT 3 // Uno Analog Pin 3
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#define COOLANT_MIST_DDR NotUsed
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#define COOLANT_MIST_PORT NotUsed
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#define COOLANT_MIST_BIT 4 // Uno Analog Pin 3
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#define COOLANT_FLOOD_DDR LPC_GPIO2->FIODIR
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#define COOLANT_FLOOD_PORT LPC_GPIO2->FIOPIN
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#define COOLANT_FLOOD_BIT 6 // MOSFET 2.6
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#define COOLANT_MIST_DDR LPC_GPIO2->FIODIR
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#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
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#define COOLANT_MIST_BIT 7 // MOSFET 2.7
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#define ENABLE_M7 // enables COOLANT MIST
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// Define user-control controls (cycle start, reset, feed hold) input pins.
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// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
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@ -333,7 +339,11 @@
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// PWM Channel PWM1_CH1 PWM1_CH2 PWM1_CH3 PWM1_CH4 PWM1_CH5 PWM1_CH6
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// Primary pin P1.18 P1.20 P1.21 P1.23 P1.24 P1.26
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// Secondary pin P2.0 P2.1 P2.2 P2.3 P2.4 P2.5
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#define SPINDLE_PWM_CHANNEL PWM1_CH6
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#ifdef SPINDLE_PWM_PIN_2_4
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#define SPINDLE_PWM_CHANNEL PWM1_CH5 // MOSFET3 (P2.4)
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#else
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#define SPINDLE_PWM_CHANNEL PWM1_CH6 // BED MOSFET (P2.5)
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#endif
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#define SPINDLE_PWM_USE_PRIMARY_PIN false
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#define SPINDLE_PWM_USE_SECONDARY_PIN true
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@ -399,10 +409,11 @@
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// Define flood and mist coolant enable output pins.
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#define COOLANT_FLOOD_DDR NotUsed
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#define COOLANT_FLOOD_PORT NotUsed
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#define COOLANT_FLOOD_BIT 3 // Uno Analog Pin 3
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#define COOLANT_MIST_DDR NotUsed
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#define COOLANT_MIST_PORT NotUsed
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#define COOLANT_MIST_BIT 4 // Uno Analog Pin 3
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#define COOLANT_FLOOD_BIT 6 // MOSFET 3 (P2.6)
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#define COOLANT_MIST_DDR LPC_GPIO2->FIODIR
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#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
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#define COOLANT_MIST_BIT 7 // MOSFET 2 (P2.7)
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#define ENABLE_M7 // enables COOLANT MIST
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// Define user-control controls (cycle start, reset, feed hold) input pins.
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// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
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@ -431,7 +442,11 @@
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// PWM Channel PWM1_CH1 PWM1_CH2 PWM1_CH3 PWM1_CH4 PWM1_CH5 PWM1_CH6
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// Primary pin P1.18 P1.20 P1.21 P1.23 P1.24 P1.26
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// Secondary pin P2.0 P2.1 P2.2 P2.3 P2.4 P2.5
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#define SPINDLE_PWM_CHANNEL PWM1_CH6
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#ifdef SPINDLE_PWM_PIN_2_4
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#define SPINDLE_PWM_CHANNEL PWM1_CH5 // MOSFET3 (P2.4)
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#else
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#define SPINDLE_PWM_CHANNEL PWM1_CH6 // BED MOSFET (P2.5)
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#endif
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#define SPINDLE_PWM_USE_PRIMARY_PIN false
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#define SPINDLE_PWM_USE_SECONDARY_PIN true
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@ -490,17 +505,18 @@
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#define LIMIT_PORT LPC_GPIO1->FIOPIN
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#define X_LIMIT_BIT 24 // X-MIN=24, X-MAX=25
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#define Y_LIMIT_BIT 26 // Y-MIN=26, Y-MAX=27
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#define Z_LIMIT_BIT 29 // Z-MIN=28, Z-MAX=29
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#define A_LIMIT_BIT 28 // reuse p1.28, as z-min is not often used
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#define Z_LIMIT_BIT 28 // Z-MIN=28, Z-MAX=29
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#define A_LIMIT_BIT 29 // reuse p1.29
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#define LIMIT_MASK ((1<<X_LIMIT_BIT)|(1<<Y_LIMIT_BIT)|(1<<Z_LIMIT_BIT)|(1<<A_LIMIT_BIT)) // All limit bits
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// Define flood and mist coolant enable output pins.
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#define COOLANT_FLOOD_DDR NotUsed
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#define COOLANT_FLOOD_PORT NotUsed
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#define COOLANT_FLOOD_BIT 3 // Uno Analog Pin 3
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#define COOLANT_MIST_DDR NotUsed
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#define COOLANT_MIST_PORT NotUsed
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#define COOLANT_MIST_BIT 4 // Uno Analog Pin 3
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#define COOLANT_FLOOD_DDR LPC_GPIO2->FIODIR
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#define COOLANT_FLOOD_PORT LPC_GPIO2->FIOPIN
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#define COOLANT_FLOOD_BIT 6 // MOSFET 2.6
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#define COOLANT_MIST_DDR LPC_GPIO2->FIODIR
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#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
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#define COOLANT_MIST_BIT 7 // MOSFET 2.7
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#define ENABLE_M7 // enables COOLANT MIST
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// Define user-control controls (cycle start, reset, feed hold) input pins.
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// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
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@ -529,7 +545,11 @@
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// PWM Channel PWM1_CH1 PWM1_CH2 PWM1_CH3 PWM1_CH4 PWM1_CH5 PWM1_CH6
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// Primary pin P1.18 P1.20 P1.21 P1.23 P1.24 P1.26
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// Secondary pin P2.0 P2.1 P2.2 P2.3 P2.4 P2.5
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#define SPINDLE_PWM_CHANNEL PWM1_CH6
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#ifdef SPINDLE_PWM_PIN_2_4
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#define SPINDLE_PWM_CHANNEL PWM1_CH5 // MOSFET3 (P2.4)
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#else
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#define SPINDLE_PWM_CHANNEL PWM1_CH6 // BED MOSFET (P2.5)
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#endif
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#define SPINDLE_PWM_USE_PRIMARY_PIN false
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#define SPINDLE_PWM_USE_SECONDARY_PIN true
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@ -599,13 +619,14 @@
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#define LIMIT_MASK ((1<<X_LIMIT_BIT)|(1<<Y_LIMIT_BIT)|(1<<Z_LIMIT_BIT)|(1<<A_LIMIT_BIT)) // All limit bits
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// Define flood and mist coolant enable output pins.
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#define COOLANT_FLOOD_DDR NotUsed
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#define COOLANT_FLOOD_PORT NotUsed
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#define COOLANT_FLOOD_BIT 3 // Uno Analog Pin 3
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#define COOLANT_MIST_DDR NotUsed
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#define COOLANT_MIST_PORT NotUsed
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#define COOLANT_MIST_BIT 4 // Uno Analog Pin 3
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#define COOLANT_FLOOD_DDR LPC_GPIO2->FIODIR
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#define COOLANT_FLOOD_PORT LPC_GPIO2->FIOPIN
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#define COOLANT_FLOOD_BIT 4 // FAN MOSFET (P2.4)
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#define COOLANT_MIST_DDR LPC_GPIO2->FIODIR
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#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
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#define COOLANT_MIST_BIT 7 // BED MOSFET (P2.7)
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#define ENABLE_M7 // enables COOLANT MIST
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// Define user-control controls (cycle start, reset, feed hold) input pins.
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// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
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#define CONTROL_DDR NotUsed
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@ -630,10 +651,14 @@
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// The LPC17xx has 6 PWM channels. Each channel has 2 pins. It can drive both pins simultaneously to the same value.
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//
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// PWM Channel PWM1_CH1 PWM1_CH2 PWM1_CH3 PWM1_CH4 PWM1_CH5 PWM1_CH6 PWM1_CH7 PWM1_CH8
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// Primary pin P1.18 P1.20 P1.21 P1.23 P1.24 P1.26 ? ?
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// Secondary pin P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7
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#define SPINDLE_PWM_CHANNEL PWM1_CH8
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// PWM Channel PWM1_CH1 PWM1_CH2 PWM1_CH3 PWM1_CH4 PWM1_CH5 PWM1_CH6
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// Primary pin P1.18 P1.20 P1.21 P1.23 P1.24 P1.26
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// Secondary pin P2.0 P2.1 P2.2 P2.3 P2.4 P2.5
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#ifdef SPINDLE_PWM_PIN_2_4
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#define SPINDLE_PWM_CHANNEL PWM1_CH5 // MOSFET3 (P2.4)
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#else
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#define SPINDLE_PWM_CHANNEL PWM1_CH6 // BED MOSFET (P2.5)
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#endif
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#define SPINDLE_PWM_USE_PRIMARY_PIN false
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#define SPINDLE_PWM_USE_SECONDARY_PIN true
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@ -313,9 +313,9 @@ uint8_t gc_execute_line(char *line)
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case 'R': word_bit = WORD_R; gc_block.values.r = value; break;
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case 'S': word_bit = WORD_S; gc_block.values.s = value; break;
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case 'T': word_bit = WORD_T;
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if (value > MAX_TOOL_NUMBER) { FAIL(STATUS_GCODE_MAX_VALUE_EXCEEDED); }
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if (value > MAX_TOOL_NUMBER) { FAIL(STATUS_GCODE_MAX_VALUE_EXCEEDED); }
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gc_block.values.t = int_value;
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break;
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break;
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case 'X': word_bit = WORD_X; gc_block.values.xyza[X_AXIS] = value; axis_words |= (1<<X_AXIS); break;
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case 'Y': word_bit = WORD_Y; gc_block.values.xyza[Y_AXIS] = value; axis_words |= (1<<Y_AXIS); break;
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case 'Z': word_bit = WORD_Z; gc_block.values.xyza[Z_AXIS] = value; axis_words |= (1<<Z_AXIS); break;
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@ -199,7 +199,7 @@ typedef struct {
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typedef struct {
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float f; // Feed
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float ijk[3]; // I,J,K Axis arc offsets
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float ijk[N_AXIS]; // I,J,K Axis arc offsets
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uint8_t l; // G10 or canned cycles parameters
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int32_t n; // Line number
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float p; // G10 or dwell parameters
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@ -23,7 +23,7 @@
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// Grbl versioning system
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#define GRBL_VERSION "1.1f"
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#define GRBL_VERSION_BUILD "20170511"
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#define GRBL_VERSION_BUILD "20171008"
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// Define standard libraries used by Grbl.
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#include <avr/io.h>
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Reference in New Issue
Block a user