ManuelW/grbl-LPC-CoreXY
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Fix for M7/8/9 modal group checks. Updated AMASS frequency cutoffs and code cleaned.

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- Updated Grbl version to 0.9c and build number.

- G-code parser was missing modal group violation checks for M7/8/9
commands. Added them.

- Updated the Adaptive Multi-Axis Step Smoothing (AMASS) cutoff
frequencies so that the trade between the 16-bit Timer1 accuracy and
the level step smoothing are somewhat better balanced. (Smoothing isn’t
free, but a higher accuracy timer would provide high cutoff
frequencies.)
This commit is contained in:
Sonny Jeon 2014-01-02 12:12:35 -07:00
parent f10bad43b2
commit f8dd8fa54d
4 changed files with 19 additions and 17 deletions
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1
gcode.c
View File

@ -179,6 +179,7 @@ uint8_t gc_execute_line(char *line)
switch(int_value) {
case 0: case 1: case 2: case 30: group_number = MODAL_GROUP_4; break;
case 3: case 4: case 5: group_number = MODAL_GROUP_7; break;
case 7: case 8: case 9: group_number = MODAL_GROUP_8; break;
}
// Set 'M' commands
switch(int_value) {

3
gcode.h
View File

@ -38,7 +38,8 @@
#define MODAL_GROUP_5 6 // [G93,G94] Feed rate mode
#define MODAL_GROUP_6 7 // [G20,G21] Units
#define MODAL_GROUP_7 8 // [M3,M4,M5] Spindle turning
#define MODAL_GROUP_12 9 // [G54,G55,G56,G57,G58,G59] Coordinate system selection
#define MODAL_GROUP_8 9 // [M7,M8,M9] Coolant control
#define MODAL_GROUP_12 10 // [G54,G55,G56,G57,G58,G59] Coordinate system selection
// Define command actions for within execution-type modal groups (motion, stopping, non-modal). Used
// internally by the parser to know which command to execute.

4
settings.h
View File

@ -25,8 +25,8 @@
#include <math.h>
#include "nuts_bolts.h"
#define GRBL_VERSION "0.9b"
#define GRBL_VERSION_BUILD "20131210"
#define GRBL_VERSION "0.9c"
#define GRBL_VERSION_BUILD "20131231"
// Version of the EEPROM data. Will be used to migrate existing data from older versions of Grbl
// when firmware is upgraded. Always stored in byte 0 of eeprom

28
stepper.c
View File

@ -34,11 +34,13 @@
#define RAMP_CRUISE 1
#define RAMP_DECEL 2
// Can't have a high of a cutoff frequency. The 16-bit timer isn't as accurate as it seems.
// There is a trade between the accuracy of the timer and the smoothness of multi-axis steps.
//
#define MAX_AMASS_LEVEL 3
#define AMASS_LEVEL1 (F_CPU/10000)
#define AMASS_LEVEL2 (F_CPU/5000)
#define AMASS_LEVEL3 (F_CPU/2500)
#define AMASS_LEVEL1 (F_CPU/8000)
#define AMASS_LEVEL2 (F_CPU/4000)
#define AMASS_LEVEL3 (F_CPU/2000)
// Stores the planner block Bresenham algorithm execution data for the segments in the segment
@ -134,8 +136,6 @@ typedef struct {
static st_prep_t prep;
static void st_config_step_timer(uint32_t cycles);
/* BLOCK VELOCITY PROFILE DEFINITION
__________________________
/| |\ _________________ ^
@ -727,14 +727,14 @@ void st_prep_buffer()
#ifdef ADAPTIVE_MULTI_AXIS_STEP_SMOOTHING
// Compute step timing and multi-axis smoothing level.
// NOTE: Only one prescalar is required with AMASS enabled.
if (cycles > AMASS_LEVEL1) {
if (cycles > AMASS_LEVEL2) {
if (cycles > AMASS_LEVEL3) { prep_segment->amass_level = 3; }
else { prep_segment->amass_level = 2; }
} else { prep_segment->amass_level = 1; }
if (cycles < AMASS_LEVEL1) { prep_segment->amass_level = 0; }
else {
if (cycles < AMASS_LEVEL2) { prep_segment->amass_level = 1; }
else if (cycles < AMASS_LEVEL3) { prep_segment->amass_level = 2; }
else { prep_segment->amass_level = 3; }
cycles >>= prep_segment->amass_level;
prep_segment->n_step <<= prep_segment->amass_level;
} else { prep_segment->amass_level = 0; }
}
if (cycles < (1UL << 16)) { prep_segment->cycles_per_tick = cycles; } // < 65536 (4.1ms @ 16MHz)
else { prep_segment->cycles_per_tick = 0xffff; } // Just set the slowest speed possible.
#else
@ -749,7 +749,7 @@ void st_prep_buffer()
prep_segment->prescaler = 3; // prescaler: 64
if (cycles < (1UL << 22)) { // < 4194304 (262ms@16MHz)
prep_segment->cycles_per_tick = cycles >> 6;
} else { // Just set the slowest speed possible.
} else { // Just set the slowest speed possible. (Around 4 step/sec.)
prep_segment->cycles_per_tick = 0xffff;
}
}
@ -778,7 +778,7 @@ void st_prep_buffer()
if (sys.state == STATE_HOLD) {
if (prep.current_speed == 0.0) {
// TODO: Check if the segment buffer gets initialized correctly.
// TODO: Check if the segment buffer gets initialized correctly.
plan_cycle_reinitialize();
sys.state = STATE_QUEUED;
}