Support sdcard bootloader
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parent
6c7e21583f
commit
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19
Makefile
19
Makefile
@ -20,8 +20,6 @@
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# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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# IN THE SOFTWARE.
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PROJECT = grbl
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INCLUDES = \
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-I CMSIS_5/CMSIS/Core/Include \
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-I CMSIS_5/CMSIS/Driver/Include \
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@ -58,8 +56,6 @@ CMSIS_EXCLUDE_OBJECTS = \
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build/cmsis/USBD_LPC17xx.o \
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build/cmsis/USBH_LPC17xx.o \
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LINKER_SCRIPT = lpc17xx/grbl.ld
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AS = arm-none-eabi-as
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CC = arm-none-eabi-gcc
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CXX = arm-none-eabi-g++
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@ -145,20 +141,23 @@ build/src/%.o : %.cpp
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$(CXX) $(CXXFLAGS) $(INCLUDES) -o $@ $<
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.PHONY: default
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default: build/$(PROJECT).hex build/$(PROJECT).bin
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default: build/grbl.hex build/firmware.bin
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build/$(PROJECT).elf: $(SRC_OBJECTS) $(CMSIS_OBJECTS) $(LINKER_SCRIPT)
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build/grbl.elf: $(SRC_OBJECTS) $(CMSIS_OBJECTS) lpc17xx/grbl.ld
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$(LD) -mcpu=cortex-m3 -mthumb -specs=nosys.specs -T$(filter %.ld, $^) -o $@ $(filter %.o, $^) $(LIBS)
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build/$(PROJECT).bin : build/$(PROJECT).elf
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build/firmware.elf: $(SRC_OBJECTS) $(CMSIS_OBJECTS) lpc17xx/firmware.ld
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$(LD) -mcpu=cortex-m3 -mthumb -specs=nosys.specs -T$(filter %.ld, $^) -o $@ $(filter %.o, $^) $(LIBS)
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build/%.bin : build/%.elf
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$(OBJCOPY) -O binary $^ $@
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build/$(PROJECT).hex : build/$(PROJECT).elf
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build/%.hex : build/%.elf
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$(OBJCOPY) -O ihex $^ $@
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.PHONY: flash
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flash: build/$(PROJECT).hex
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fm COM(13, 115200) DEVICE(LPC1769, 0.000000, 0) HARDWARE(BOOTEXEC, 50, 100) ERASEUSED(build\$(PROJECT).hex, PROTECTISP) HEXFILE(build\$(PROJECT).hex, NOCHECKSUMS, NOFILL, PROTECTISP)
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flash: build/grbl.hex
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fm COM(13, 115200) DEVICE(LPC1769, 0.000000, 0) HARDWARE(BOOTEXEC, 50, 100) ERASEUSED(build\grbl.hex, PROTECTISP) HEXFILE(build\grbl.hex, NOCHECKSUMS, NOFILL, PROTECTISP)
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.PHONY: clean
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clean:
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193
lpc17xx/firmware.ld
Normal file
193
lpc17xx/firmware.ld
Normal file
@ -0,0 +1,193 @@
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/* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* THE AUTHORS SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. USE IT AT YOUR OWN RISK */
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/* This linker script is for firmware.bin, which is compatible with the sdcard bootloader.
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*/
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MEMORY
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{
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/* LPC1768 : 512k ROM + 64k SRAM */
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/*------------------------------ */
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/* On-chip ROM is a readable (r), executable region (x) */
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/* On-chip SRAM is a readable (r), writable (w) and */
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/* executable region (x) */
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/* vector table */
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VECT (rx) : ORIGIN = 0x00004000, LENGTH = 4k
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/* ROM. Skips the remaining 4k flash sectors so they can be used for persistent data */
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IROM (rx) : ORIGIN = 0x00010000, LENGTH = 0x70000 /* 512k - 0x10000 */
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/* local static RAM - 32k for LPC1756 */
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IRAM0 (rwx) : ORIGIN = 0x10000000, LENGTH = 32736 /* 32k-32: 32 bytes at top reserved by IAP */
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/* AHB SRAM - 16k for LPC1756 - often used for USB */
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IRAM1 (rwx) : ORIGIN = 0x2007C000, LENGTH = 16k
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IRAM2 (rwx) : ORIGIN = 0x20080000, LENGTH = 16k
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}
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/* SECTION command : Define mapping of input sections */
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/* into output sections. */
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SECTIONS
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{
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/******************************************/
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/* code section */
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.isr_vector_section :
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{
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KEEP(*(.isr_vector .isr_vector.*))
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} >VECT
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/* "normal" code */
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.text :
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{
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*(.text .text.*)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.gcc_except_table)
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*(.rodata .rodata*)
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*(.gnu.linkonce.r.*)
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} >IROM
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/******************************************/
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/* .ctors .dtors are used for c++ constructors/destructors */
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.ctors :
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{
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. = ALIGN(4);
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PROVIDE(__ctors_start = .);
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KEEP(*(SORT(.ctors.*)))
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KEEP(*(.ctors))
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PROVIDE(__ctors_end = .);
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} >IROM
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.dtors :
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{
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. = ALIGN(4);
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PROVIDE(__dtors_start = .);
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KEEP(*(SORT(.dtors.*)))
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KEEP(*(.dtors))
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PROVIDE(__dtors_end = .);
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. = ALIGN(4);
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/* End Of .text section */
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_etext = .;
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_sifastcode = .;
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} >IROM
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/**************************************************/
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/* fastcode - copied at startup & executed in RAM */
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.fastcode :
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{
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. = ALIGN (4);
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_sfastcode = . ;
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*(.glue_7t) *(.glue_7)
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*(.fastcode)
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/* add other modules here ... */
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. = ALIGN (4);
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_efastcode = . ;
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_sidata = .;
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} >IRAM0 AT>IROM
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/******************************************/
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/* This used for USB RAM section */
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.usb_ram (NOLOAD):
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{
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*.o (USB_RAM)
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} > IRAM1
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/******************************************/
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/* data section */
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.data :
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{
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_sidata = LOADADDR (.data);
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. = ALIGN(4);
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_sdata = .;
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*(vtable vtable.*)
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*(.data .data.*)
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*(.gnu.linkonce.d*)
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. = ALIGN(4);
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_edata = . ;
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} >IRAM0 AT>IROM
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/******************************************/
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/* For no-init variables section */
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.bss (NOLOAD) :
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{
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. = ALIGN(4);
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_sbss = . ;
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__bss_start__ = .;
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*(.bss .bss.*)
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*(.gnu.linkonce.b*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = . ;
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__bss_end__ = .;
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} >IRAM0
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/******************************************/
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/* For stack section */
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.stackarea (NOLOAD) :
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{
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. = ALIGN(8);
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_sstack = .;
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*(.stackarea .stackarea.*)
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. = ALIGN(8);
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_estack = .;
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. = ALIGN(4);
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_end = . ;
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PROVIDE (end = .);
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} > IRAM0
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/******************************************/
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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/* .comment 0 : { *(.comment) } */
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/* DWARF debug sections.
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Symbols in the DWARF debugging sections are relative to the beginning
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of the section so we begin them at 0. */
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/* DWARF 1 */
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.debug 0 : { *(.debug) }
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.line 0 : { *(.line) }
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/* GNU DWARF 1 extensions */
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.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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/* DWARF 1.1 and DWARF 2 */
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.debug_aranges 0 : { *(.debug_aranges) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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/* DWARF 2 */
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.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_line 0 : { *(.debug_line) }
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.debug_frame 0 : { *(.debug_frame) }
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.debug_str 0 : { *(.debug_str) }
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.debug_loc 0 : { *(.debug_loc) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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/* SGI/MIPS DWARF 2 extensions */
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.debug_weaknames 0 : { *(.debug_weaknames) }
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.debug_funcnames 0 : { *(.debug_funcnames) }
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.debug_typenames 0 : { *(.debug_typenames) }
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.debug_varnames 0 : { *(.debug_varnames) }
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}
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* THE AUTHORS SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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* CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. USE IT AT YOUR OWN RISK */
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/* This linker script is for grbl.hex, the standalone build (not compatible with sdcard bootloader)
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*/
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MEMORY
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{
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/* LPC1768 : 512k ROM + 64k SRAM */
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