grbl-LPC-CoreXY/sim/avr/wdt.h
ashelly 9b37637ae6 Bug fixes for timers, added some wdt support for limit debounce.
- Typo in timer def,
- Handle 8 bit timers correctly,
- Don't skip TOP count in CTC mode
- added SREG for atomic bit operations
2014-07-10 13:01:03 -04:00

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154 B
C

#define WDTCSR wdt
#define WDP0 0
#define WDP1 1
#define WDP2 2
#define WDE 3
#define WDCE 4
#define WDP3 5
#define WDIE 6
#define WDIF 7
uint16_t wdt;