152 lines
5.5 KiB
C
152 lines
5.5 KiB
C
// This file has been prepared for Doxygen automatic documentation generation.
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/*! \file ********************************************************************
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*
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* Atmel Corporation
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*
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* \li File: eeprom.c
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* \li Compiler: IAR EWAAVR 3.10c
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* \li Support mail: avr@atmel.com
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*
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* \li Supported devices: All devices with split EEPROM erase/write
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* capabilities can be used.
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* The example is written for ATmega48.
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*
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* \li AppNote: AVR103 - Using the EEPROM Programming Modes.
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*
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* \li Description: Example on how to use the split EEPROM erase/write
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* capabilities in e.g. ATmega48. All EEPROM
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* programming modes are tested, i.e. Erase+Write,
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* Erase-only and Write-only.
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*
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* $Revision: 1.6 $
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* $Date: Friday, February 11, 2005 07:16:44 UTC $
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****************************************************************************/
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#include <avr/io.h>
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#include <avr/interrupt.h>
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/* These EEPROM bits have different names on different devices. */
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#ifndef EEPE
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#define EEPE EEWE //!< EEPROM program/write enable.
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#define EEMPE EEMWE //!< EEPROM master program/write enable.
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#endif
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/* These two are unfortunately not defined in the device include files. */
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#define EEPM1 5 //!< EEPROM Programming Mode Bit 1.
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#define EEPM0 4 //!< EEPROM Programming Mode Bit 0.
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/* Define to reduce code size. */
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#define EEPROM_IGNORE_SELFPROG //!< Remove SPM flag polling.
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/*! \brief Read byte from EEPROM.
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*
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* This function reads one byte from a given EEPROM address.
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*
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* \note The CPU is halted for 4 clock cycles during EEPROM read.
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*
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* \param addr EEPROM address to read from.
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* \return The byte read from the EEPROM address.
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*/
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unsigned char eeprom_get_char( unsigned int addr )
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{
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do {} while( EECR & (1<<EEPE) ); // Wait for completion of previous write.
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EEAR = addr; // Set EEPROM address register.
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EECR = (1<<EERE); // Start EEPROM read operation.
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return EEDR; // Return the byte read from EEPROM.
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}
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/*! \brief Write byte to EEPROM.
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*
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* This function writes one byte to a given EEPROM address.
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* The differences between the existing byte and the new value is used
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* to select the most efficient EEPROM programming mode.
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*
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* \note The CPU is halted for 2 clock cycles during EEPROM programming.
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*
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* \note When this function returns, the new EEPROM value is not available
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* until the EEPROM programming time has passed. The EEPE bit in EECR
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* should be polled to check whether the programming is finished.
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*
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* \note The EEPROM_GetChar() function checks the EEPE bit automatically.
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*
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* \param addr EEPROM address to write to.
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* \param new_value New EEPROM value.
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*/
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void eeprom_put_char( unsigned int addr, unsigned char new_value )
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{
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char old_value; // Old EEPROM value.
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char diff_mask; // Difference mask, i.e. old value XOR new value.
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cli(); // Ensure atomic operation for the write operation.
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do {} while( EECR & (1<<EEPE) ); // Wait for completion of previous write.
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#ifndef EEPROM_IGNORE_SELFPROG
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do {} while( SPMCSR & (1<<SELFPRGEN) ); // Wait for completion of SPM.
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#endif
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EEAR = addr; // Set EEPROM address register.
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EECR = (1<<EERE); // Start EEPROM read operation.
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old_value = EEDR; // Get old EEPROM value.
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diff_mask = old_value ^ new_value; // Get bit differences.
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// Check if any bits are changed to '1' in the new value.
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if( diff_mask & new_value ) {
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// Now we know that _some_ bits need to be erased to '1'.
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// Check if any bits in the new value are '0'.
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if( new_value != 0xff ) {
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// Now we know that some bits need to be programmed to '0' also.
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EEDR = new_value; // Set EEPROM data register.
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EECR = (1<<EEMPE) | // Set Master Write Enable bit...
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(0<<EEPM1) | (0<<EEPM0); // ...and Erase+Write mode.
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EECR |= (1<<EEPE); // Start Erase+Write operation.
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} else {
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// Now we know that all bits should be erased.
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EECR = (1<<EEMPE) | // Set Master Write Enable bit...
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(1<<EEPM0); // ...and Erase-only mode.
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EECR |= (1<<EEPE); // Start Erase-only operation.
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}
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} else {
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// Now we know that _no_ bits need to be erased to '1'.
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// Check if any bits are changed from '1' in the old value.
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if( diff_mask ) {
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// Now we know that _some_ bits need to the programmed to '0'.
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EEDR = new_value; // Set EEPROM data register.
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EECR = (1<<EEMPE) | // Set Master Write Enable bit...
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(1<<EEPM1); // ...and Write-only mode.
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EECR |= (1<<EEPE); // Start Write-only operation.
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}
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}
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sei(); // Restore interrupt flag state.
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}
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// Extensions added as part of Grbl
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void memcpy_to_eeprom_with_checksum(unsigned int destination, char *source, unsigned int size) {
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unsigned char checksum = 0;
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for(; size > 0; size--) {
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checksum = (checksum << 1) || (checksum >> 7);
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checksum += *source;
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eeprom_put_char(destination++, *(source++));
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}
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eeprom_put_char(destination, checksum);
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}
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int memcpy_from_eeprom_with_checksum(char *destination, unsigned int source, unsigned int size) {
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unsigned char data, checksum = 0;
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for(; size > 0; size--) {
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data = eeprom_get_char(source++);
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checksum = (checksum << 1) || (checksum >> 7);
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checksum += data;
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*(destination++) = data;
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}
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return(checksum == eeprom_get_char(source));
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}
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// end of file
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