/*
cpu_map.h - CPU and pin mapping configuration file
Part of Grbl
Copyright (c) 2012-2016 Sungeun K. Jeon for Gnea Research LLC
Grbl is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
Grbl is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with Grbl. If not, see .
*/
/* The cpu_map.h files serve as a central pin mapping selection file for different
processor types or alternative pin layouts. This version of Grbl officially supports
only the Arduino Mega328p. */
#ifndef cpu_map_h
#define cpu_map_h
#ifdef CPU_MAP_ATMEGA328P // (Arduino Uno) Officially supported by Grbl.
// Define serial port pins and interrupt vectors.
#define SERIAL_RX USART_RX_vect
#define SERIAL_UDRE USART_UDRE_vect
// Define step pulse output pins. NOTE: All step bit pins must be on the same port.
#define STEP_DDR DDRD
#define STEP_PORT PORTD
#define X_STEP_BIT 2 // Uno Digital Pin 2
#define Y_STEP_BIT 3 // Uno Digital Pin 3
#define Z_STEP_BIT 4 // Uno Digital Pin 4
#define STEP_MASK ((1< 62.5kHz
// #define SPINDLE_TCCRB_INIT_MASK (1< 7.8kHz (Used in v0.9)
// #define SPINDLE_TCCRB_INIT_MASK ((1< 1.96kHz
#define SPINDLE_TCCRB_INIT_MASK (1< 0.98kHz (J-tech laser)
// NOTE: On the 328p, these must be the same as the SPINDLE_ENABLE settings.
#define SPINDLE_PWM_DDR DDRB
#define SPINDLE_PWM_PORT PORTB
#define SPINDLE_PWM_BIT 3 // Uno Digital Pin 11
#endif // end of CPU_MAP_ATMEGA328P
#ifdef CPU_MAP_SMOOTHIEBOARD // (Smoothieboards)
// Define serial port pins and interrupt vectors.
#define SERIAL_RX USART_RX_vect
#define SERIAL_UDRE USART_UDRE_vect
// Define step pulse output pins. NOTE: All step bit pins must be on the same port.
#define STEP_DDR LPC_GPIO2->FIODIR
#define STEP_PORT LPC_GPIO2->FIOPIN
#define X_STEP_BIT 0
#define Y_STEP_BIT 1
#define Z_STEP_BIT 2
#define A_STEP_BIT 3
#define STEP_MASK ((1<FIODIR
#define DIRECTION_PORT LPC_GPIO0->FIOPIN
#define X_DIRECTION_BIT 5
#define Y_DIRECTION_BIT 11
#define Z_DIRECTION_BIT 20
#define A_DIRECTION_BIT 22
#define DIRECTION_MASK ((1<FIODIR
#define STEPPERS_DISABLE_PORT LPC_GPIO0->FIOPIN
#define X_DISABLE_BIT 4
#define Y_DISABLE_BIT 10
#define Z_DISABLE_BIT 19
#define A_DISABLE_BIT 21
#define STEPPERS_DISABLE_MASK ((1<FIODIR
#define LIMIT_PIN LPC_GPIO1->FIOPIN
#define LIMIT_PORT LPC_GPIO1->FIOPIN
#define X_LIMIT_BIT 24 // X-MIN=24, X-MAX=25
#define Y_LIMIT_BIT 26 // Y-MIN=26, Y-MAX=27
#define Z_LIMIT_BIT 28 // Z-MIN=28, Z-MAX=29
#define A_LIMIT_BIT 29 // reuse p1.29
#define LIMIT_MASK ((1<FIODIR
#define COOLANT_FLOOD_PORT LPC_GPIO2->FIOPIN
#define COOLANT_FLOOD_BIT 4 // SMALL MOSFET Q8 (P2.4)
#define COOLANT_MIST_DDR LPC_GPIO2->FIODIR
#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
#define COOLANT_MIST_BIT 6 // SMALL MOSFET Q9 (P2.6)
#define ENABLE_M7 // enables COOLANT MIST
// Define user-control controls (cycle start, reset, feed hold) input pins.
// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
#define CONTROL_DDR NotUsed
#define CONTROL_PIN NotUsed
#define CONTROL_PORT NotUsed
#define CONTROL_RESET_BIT 0 // Uno Analog Pin 0
#define CONTROL_FEED_HOLD_BIT 1 // Uno Analog Pin 1
#define CONTROL_CYCLE_START_BIT 2 // Uno Analog Pin 2
#define CONTROL_SAFETY_DOOR_BIT 1 // Uno Analog Pin 1 NOTE: Safety door is shared with feed hold. Enabled by config define.
#define CONTROL_INT PCIE1 // Pin change interrupt enable pin
#define CONTROL_INT_vect PCINT1_vect
#define CONTROL_PCMSK NotUsed // Pin change interrupt register
#define CONTROL_MASK ((1<FIODIR
#define STEP_PORT LPC_GPIO2->FIOPIN
#define X_STEP_BIT 0
#define Y_STEP_BIT 1
#define Z_STEP_BIT 2
#define A_STEP_BIT 3
#define STEP_MASK ((1<FIODIR
#define DIRECTION_PORT LPC_GPIO0->FIOPIN
#define X_DIRECTION_BIT 5
#define Y_DIRECTION_BIT 11
#define Z_DIRECTION_BIT 20
#define A_DIRECTION_BIT 22
#define DIRECTION_MASK ((1<FIODIR
#define STEPPERS_DISABLE_PORT LPC_GPIO0->FIOPIN
#define X_DISABLE_BIT 4
#define Y_DISABLE_BIT 10
#define Z_DISABLE_BIT 19
#define A_DISABLE_BIT 21
#define STEPPERS_DISABLE_MASK ((1<FIODIR
#define LIMIT_PIN LPC_GPIO1->FIOPIN
#define LIMIT_PORT LPC_GPIO1->FIOPIN
#define X_LIMIT_BIT 24 // X-MIN=24, X-MAX=25
#define Y_LIMIT_BIT 26 // Y-MIN=26, Y-MAX=27
#define Z_LIMIT_BIT 28 // Z-MIN=28, Z-MAX=29
#define A_LIMIT_BIT 29 // reuse p1.29 from Z-MAX
#define LIMIT_MASK ((1<FIODIR
#define COOLANT_FLOOD_PORT LPC_GPIO2->FIOPIN
#define COOLANT_FLOOD_BIT 6 // MOSFET 2.6
#define COOLANT_MIST_DDR LPC_GPIO2->FIODIR
#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
#define COOLANT_MIST_BIT 7 // MOSFET 2.7
#define ENABLE_M7 // enables COOLANT MIST
// Define user-control controls (cycle start, reset, feed hold) input pins.
// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
#define CONTROL_DDR NotUsed
#define CONTROL_PIN NotUsed
#define CONTROL_PORT NotUsed
#define CONTROL_RESET_BIT 0 // Uno Analog Pin 0
#define CONTROL_FEED_HOLD_BIT 1 // Uno Analog Pin 1
#define CONTROL_CYCLE_START_BIT 2 // Uno Analog Pin 2
#define CONTROL_SAFETY_DOOR_BIT 1 // Uno Analog Pin 1 NOTE: Safety door is shared with feed hold. Enabled by config define.
#define CONTROL_INT PCIE1 // Pin change interrupt enable pin
#define CONTROL_INT_vect PCINT1_vect
#define CONTROL_PCMSK NotUsed // Pin change interrupt register
#define CONTROL_MASK ((1<FIODIR
#define STEP_PORT LPC_GPIO2->FIOPIN
#define X_STEP_BIT 0
#define Y_STEP_BIT 1
#define Z_STEP_BIT 2
#define A_STEP_BIT 3
#define STEP_MASK ((1<FIODIR
#define DIRECTION_PORT LPC_GPIO0->FIOPIN
#define X_DIRECTION_BIT 5
#define Y_DIRECTION_BIT 11
#define Z_DIRECTION_BIT 20
#define A_DIRECTION_BIT 22
#define DIRECTION_MASK ((1<FIODIR
#define STEPPERS_DISABLE_PORT LPC_GPIO0->FIOPIN
#define X_DISABLE_BIT 4
#define Y_DISABLE_BIT 10
#define Z_DISABLE_BIT 19
#define A_DISABLE_BIT 21
#define STEPPERS_DISABLE_MASK ((1<FIODIR
#define LIMIT_PIN LPC_GPIO1->FIOPIN
#define LIMIT_PORT LPC_GPIO1->FIOPIN
#define X_LIMIT_BIT 24 // X-MIN=24, X-MAX=25
#define Y_LIMIT_BIT 26 // Y-MIN=26, Y-MAX=27
#define Z_LIMIT_BIT 28 // Z-MIN=28, Z-MAX=29
#define A_LIMIT_BIT 29 // reuse p1.29 from Z-MAX
#define LIMIT_MASK ((1<FIODIR
#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
#define COOLANT_MIST_BIT 7 // MOSFET 2 (P2.7)
#define ENABLE_M7 // enables COOLANT MIST
// Define user-control controls (cycle start, reset, feed hold) input pins.
// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
#define CONTROL_DDR NotUsed
#define CONTROL_PIN NotUsed
#define CONTROL_PORT NotUsed
#define CONTROL_RESET_BIT 0 // Uno Analog Pin 0
#define CONTROL_FEED_HOLD_BIT 1 // Uno Analog Pin 1
#define CONTROL_CYCLE_START_BIT 2 // Uno Analog Pin 2
#define CONTROL_SAFETY_DOOR_BIT 1 // Uno Analog Pin 1 NOTE: Safety door is shared with feed hold. Enabled by config define.
#define CONTROL_INT PCIE1 // Pin change interrupt enable pin
#define CONTROL_INT_vect PCINT1_vect
#define CONTROL_PCMSK NotUsed // Pin change interrupt register
#define CONTROL_MASK ((1<FIODIR
#define STEP_PORT LPC_GPIO2->FIOPIN
#define X_STEP_BIT 0
#define Y_STEP_BIT 1
#define Z_STEP_BIT 2
#define A_STEP_BIT 3
#define STEP_MASK ((1<FIODIR
#define DIRECTION_PORT LPC_GPIO0->FIOPIN
#define X_DIRECTION_BIT 5
#define Y_DIRECTION_BIT 11
#define Z_DIRECTION_BIT 20
#define A_DIRECTION_BIT 22
#define DIRECTION_MASK ((1<FIODIR
#define STEPPERS_DISABLE_PORT LPC_GPIO0->FIOPIN
#define X_DISABLE_BIT 4
#define Y_DISABLE_BIT 10
#define Z_DISABLE_BIT 19
#define A_DISABLE_BIT 21
#define STEPPERS_DISABLE_MASK ((1<FIODIR
#define LIMIT_PIN LPC_GPIO1->FIOPIN
#define LIMIT_PORT LPC_GPIO1->FIOPIN
#define X_LIMIT_BIT 24 // X-MIN=24, X-MAX=25
#define Y_LIMIT_BIT 26 // Y-MIN=26, Y-MAX=27
#define Z_LIMIT_BIT 28 // Z-MIN=28, Z-MAX=29
#define A_LIMIT_BIT 29 // reuse p1.29
#define LIMIT_MASK ((1<FIODIR
#define COOLANT_FLOOD_PORT LPC_GPIO2->FIOPIN
#define COOLANT_FLOOD_BIT 6 // MOSFET 2.6
#define COOLANT_MIST_DDR LPC_GPIO2->FIODIR
#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
#define COOLANT_MIST_BIT 7 // MOSFET 2.7
#define ENABLE_M7 // enables COOLANT MIST
// Define user-control controls (cycle start, reset, feed hold) input pins.
// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
#define CONTROL_DDR NotUsed
#define CONTROL_PIN NotUsed
#define CONTROL_PORT NotUsed
#define CONTROL_RESET_BIT 0 // Uno Analog Pin 0
#define CONTROL_FEED_HOLD_BIT 1 // Uno Analog Pin 1
#define CONTROL_CYCLE_START_BIT 2 // Uno Analog Pin 2
#define CONTROL_SAFETY_DOOR_BIT 1 // Uno Analog Pin 1 NOTE: Safety door is shared with feed hold. Enabled by config define.
#define CONTROL_INT PCIE1 // Pin change interrupt enable pin
#define CONTROL_INT_vect PCINT1_vect
#define CONTROL_PCMSK NotUsed // Pin change interrupt register
#define CONTROL_MASK ((1<FIODIR
#define STEP_PORT LPC_GPIO2->FIOPIN
#define X_STEP_BIT 1
#define Y_STEP_BIT 2
#define Z_STEP_BIT 3
#define A_STEP_BIT 0
#define STEP_MASK ((1<FIODIR
#define DIRECTION_PORT LPC_GPIO0->FIOPIN
#define X_DIRECTION_BIT 11
#define Y_DIRECTION_BIT 20
#define Z_DIRECTION_BIT 22
#define A_DIRECTION_BIT 5
#define DIRECTION_MASK ((1<FIODIR
#define STEPPERS_DISABLE_PORT LPC_GPIO0->FIOPIN
#define X_DISABLE_BIT 10
#define Y_DISABLE_BIT 19
#define Z_DISABLE_BIT 21
#define A_DISABLE_BIT 4
#define STEPPERS_DISABLE_MASK ((1<FIODIR
#define LIMIT_PIN LPC_GPIO1->FIOPIN
#define LIMIT_PORT LPC_GPIO1->FIOPIN
#define X_LIMIT_BIT 24 // X-MIN=24, X-MAX=27
#define Y_LIMIT_BIT 25 // Y-MIN=25, Y-MAX=28
#define Z_LIMIT_BIT 26 // Z-MIN=26, Z-MAX=29
#define A_LIMIT_BIT 27 // reuse p1.27, as X-MAX is not used
#define LIMIT_MASK ((1<FIODIR
#define COOLANT_FLOOD_PORT LPC_GPIO2->FIOPIN
#define COOLANT_FLOOD_BIT 4 // FAN MOSFET (P2.4)
#define COOLANT_MIST_DDR LPC_GPIO2->FIODIR
#define COOLANT_MIST_PORT LPC_GPIO2->FIOPIN
#define COOLANT_MIST_BIT 7 // BED MOSFET (P2.7)
#define ENABLE_M7 // enables COOLANT MIST
// Define user-control controls (cycle start, reset, feed hold) input pins.
// NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits).
#define CONTROL_DDR NotUsed
#define CONTROL_PIN NotUsed
#define CONTROL_PORT NotUsed
#define CONTROL_RESET_BIT 0 // Uno Analog Pin 0
#define CONTROL_FEED_HOLD_BIT 1 // Uno Analog Pin 1
#define CONTROL_CYCLE_START_BIT 2 // Uno Analog Pin 2
#define CONTROL_SAFETY_DOOR_BIT 1 // Uno Analog Pin 1 NOTE: Safety door is shared with feed hold. Enabled by config define.
#define CONTROL_INT PCIE1 // Pin change interrupt enable pin
#define CONTROL_INT_vect PCINT1_vect
#define CONTROL_PCMSK NotUsed // Pin change interrupt register
#define CONTROL_MASK ((1<