diff --git a/grbl-lpc/avr/io.h b/grbl-lpc/avr/io.h index 1e4e5ee..c622455 100644 --- a/grbl-lpc/avr/io.h +++ b/grbl-lpc/avr/io.h @@ -8,64 +8,7 @@ struct DummyReg { uint8_t operator|=(uint8_t x) {return *this = *this | x;} }; -extern DummyReg DDRA; -extern DummyReg DDRB; -extern DummyReg DDRC; -extern DummyReg DDRD; - -extern DummyReg PORTA; -extern DummyReg PORTB; -extern DummyReg PORTC; -extern DummyReg PORTD; - -extern DummyReg PINA; -extern DummyReg PINB; -extern DummyReg PINC; -extern DummyReg PIND; - -extern DummyReg EEAR; -extern DummyReg EECR; -extern DummyReg EEDR; -extern DummyReg EEMPE; -extern DummyReg EEPE; -extern DummyReg OCR2A; +extern DummyReg NotUsed; extern DummyReg PCICR; -extern DummyReg PCIE0; extern DummyReg PCIE1; -extern DummyReg PCMSK0; -extern DummyReg PCMSK1; -extern DummyReg TCCR2A; -extern DummyReg TCCR2B; -extern DummyReg UCSR0A; -extern DummyReg UCSR0B; -extern DummyReg U2X0; -extern DummyReg UBRR0H; -extern DummyReg UBRR0L; -extern DummyReg UDR0; - - -static const int COM1A0 = 0; -static const int COM1A1 = 0; -static const int COM1B0 = 0; -static const int COM1B1 = 0; -static const int COM2A0 = 0; -static const int COM2A1 = 0; -static const int COM2B0 = 0; -static const int COM2B1 = 0; - - static const int CS22 = 0; -static const int EEMWE = 0; -static const int EERE = 0; -static const int EEWE = 0; -static const int WGM10 = 0; -static const int WGM11 = 0; -static const int WGM12 = 0; -static const int WGM13 = 0; -static const int WGM20 = 0; -static const int WGM21 = 0; - -static const int RXEN0 = 0; -static const int TXEN0 = 0; -static const int RXCIE0 = 0; -static const int UDRIE0 = 0; diff --git a/grbl/config.h b/grbl/config.h index 3396771..91f5932 100644 --- a/grbl/config.h +++ b/grbl/config.h @@ -677,32 +677,32 @@ */ // Define flood and mist coolant enable output pins. -#define COOLANT_FLOOD_DDR DDRC -#define COOLANT_FLOOD_PORT PORTC +#define COOLANT_FLOOD_DDR NotUsed +#define COOLANT_FLOOD_PORT NotUsed #define COOLANT_FLOOD_BIT 3 // Uno Analog Pin 3 -#define COOLANT_MIST_DDR DDRC -#define COOLANT_MIST_PORT PORTC +#define COOLANT_MIST_DDR NotUsed +#define COOLANT_MIST_PORT NotUsed #define COOLANT_MIST_BIT 4 // Uno Analog Pin 3 // Define user-control controls (cycle start, reset, feed hold) input pins. // NOTE: All CONTROLs pins must be on the same port and not on a port with other input pins (limits). -#define CONTROL_DDR DDRC -#define CONTROL_PIN PINC -#define CONTROL_PORT PORTC +#define CONTROL_DDR NotUsed +#define CONTROL_PIN NotUsed +#define CONTROL_PORT NotUsed #define CONTROL_RESET_BIT 0 // Uno Analog Pin 0 #define CONTROL_FEED_HOLD_BIT 1 // Uno Analog Pin 1 #define CONTROL_CYCLE_START_BIT 2 // Uno Analog Pin 2 #define CONTROL_SAFETY_DOOR_BIT 1 // Uno Analog Pin 1 NOTE: Safety door is shared with feed hold. Enabled by config define. #define CONTROL_INT PCIE1 // Pin change interrupt enable pin #define CONTROL_INT_vect PCINT1_vect -#define CONTROL_PCMSK PCMSK1 // Pin change interrupt register +#define CONTROL_PCMSK NotUsed // Pin change interrupt register #define CONTROL_MASK ((1<