Refactoring and lots of bug fixes. Updated homing cycle.

WARNING: There are still some bugs to be worked out. Please use caution
if you test this firmware.

- Feed holds work much better, but there are still some failure
conditions that need to be worked out. This is the being worked on
currently and a fix is planned to be pushed next.

- Homing cycle refactoring: Slight adjustment of the homing cycle to
allow for limit pins to be shared by different axes, as long as the
shared limit pins are not homed on the same cycle. Also, removed the
LOCATE_CYCLE portion of the homing cycle configuration. It was
redundant.

- Limit pin sharing: (See above). To clear up one or two limit pins for
other IO, limit pins can now be shared. For example, the Z-limit can be
shared with either X or Y limit pins, because it’s on a separate homing
cycle. Hard limit will still work exactly as before.

- Spindle pin output fixed. The pins weren’t getting initialized
correctly.

- Fixed a cycle issue where streaming was working almost like a single
block mode. This was caused by a problem with the spindle_run() and
coolant_run() commands and issuing an unintended planner buffer sync.

- Refactored the cycle_start, feed_hold, and other runtime routines
into the runtime command module, where they should be handled here
only. These were redundant.

- Moved some function calls around into more appropriate source code
modules.

- Fixed the reporting of spindle state.

spindle_control.c

@@ -21,23 +21,21 @@
 
 #include "system.h"
 #include "spindle_control.h"
-#include "planner.h"
+#include "protocol.h"
 
 
 void spindle_init()
-{  
-  SPINDLE_DIRECTION_DDR |= (1<<SPINDLE_DIRECTION_BIT);
-  
+{    
   // On the Uno, spindle enable and PWM are shared. Other CPUs have seperate enable pin.
   #ifdef VARIABLE_SPINDLE
-    SPINDLE_PWM_DDR |= (1<<SPINDLE_PWM_BIT);
+    SPINDLE_PWM_DDR |= (1<<SPINDLE_PWM_BIT); // Configure as PWM output pin.
     #ifndef CPU_MAP_ATMEGA328P 
-      SPINDLE_ENABLE_PORT |= (1<<SPINDLE_ENABLE_BIT);
+      SPINDLE_ENABLE_DDR |= (1<<SPINDLE_ENABLE_BIT); // Configure as output pin.
     #endif     
   #else
-    SPINDLE_ENABLE_PORT |= (1<<SPINDLE_ENABLE_BIT);
+    SPINDLE_ENABLE_DDR |= (1<<SPINDLE_ENABLE_BIT); // Configure as output pin.
   #endif
-  
+  SPINDLE_DIRECTION_DDR |= (1<<SPINDLE_DIRECTION_BIT); // Configure as output pin.
   spindle_stop();
 }
 
@@ -48,10 +46,10 @@ void spindle_stop()
   #ifdef VARIABLE_SPINDLE
     TCCRA_REGISTER &= ~(1<<COMB_BIT); // Disable PWM. Output voltage is zero.
     #ifndef CPU_MAP_ATMEGA328P 
-      SPINDLE_ENABLE_PORT &= ~(1<<SPINDLE_ENABLE_BIT);
+      SPINDLE_ENABLE_PORT &= ~(1<<SPINDLE_ENABLE_BIT); // Set pin to low.
     #endif
   #else
-    SPINDLE_ENABLE_PORT &= ~(1<<SPINDLE_ENABLE_BIT);
+    SPINDLE_ENABLE_PORT &= ~(1<<SPINDLE_ENABLE_BIT); // Set pin to low.
   #endif  
 }
 
@@ -59,7 +57,7 @@ void spindle_stop()
 void spindle_run(uint8_t direction, float rpm) 
 {
   // Empty planner buffer to ensure spindle is set when programmed.
-  plan_synchronize(); 
+  protocol_buffer_synchronize(); 
 
   // Halt or set spindle direction and rpm. 
   if (direction == SPINDLE_DISABLE) {
@@ -67,7 +65,7 @@ void spindle_run(uint8_t direction, float rpm)
     spindle_stop();
   
   } else {
-  
+ 
     if (direction == SPINDLE_ENABLE_CW) {
       SPINDLE_DIRECTION_PORT &= ~(1<<SPINDLE_DIRECTION_BIT);
     } else {