From 4ba78b416fb99a05de727edb160553acf5a6f72b Mon Sep 17 00:00:00 2001 From: Todd Fleming Date: Wed, 4 Jan 2017 13:43:06 -0500 Subject: [PATCH] Brett's changes --- grbl/main.c | 50 ++++++++++++++++++++++++++++++++++++++++ smoother/avr/interrupt.h | 2 ++ smoother/avr/io.h | 27 +++++++++++++++++++++- 3 files changed, 78 insertions(+), 1 deletion(-) diff --git a/grbl/main.c b/grbl/main.c index be0b4ac..4db693c 100644 --- a/grbl/main.c +++ b/grbl/main.c @@ -21,6 +21,56 @@ #include "grbl.h" +/*Holding space for dummy registers*/ +DummyReg DDRA; +DummyReg DDRB; +DummyReg DDRC; +DummyReg DDRD; + +DummyReg PORTA; +DummyReg PORTB; +DummyReg PORTC; +DummyReg PORTD; + +DummyReg PINA; +DummyReg PINB; +DummyReg PINC; +DummyReg PIND; + +DummyReg EEAR; +DummyReg EECR; +DummyReg EEDR; +DummyReg EEMPE; +DummyReg EEPE; +DummyReg OCIE0A; +DummyReg OCIE0B; +DummyReg OCIE1A; +DummyReg OCR1A; +DummyReg OCR2A; +DummyReg PCICR; +DummyReg PCIE0; +DummyReg PCIE1; +DummyReg PCMSK0; +DummyReg PCMSK1; +DummyReg SREG; +DummyReg TCCR0A; +DummyReg TCCR0B; +DummyReg TCCR1A; +DummyReg TCCR1B; +DummyReg TCCRA; +DummyReg TCCR2A; +DummyReg TCCR2B; +DummyReg TCNT0; +DummyReg TIMSK0; +DummyReg TIMSK1; +DummyReg TOIE0; + +DummyReg UCSR0A; +DummyReg UCSR0B; +DummyReg U2X0; +DummyReg UBRR0H; +DummyReg UBRR0L; +DummyReg UDR0; // Declare system global variable structure system_t sys; diff --git a/smoother/avr/interrupt.h b/smoother/avr/interrupt.h index 994261e..b90688e 100644 --- a/smoother/avr/interrupt.h +++ b/smoother/avr/interrupt.h @@ -1,3 +1,5 @@ +#pragma once + #define ISR(f) void f() inline void cli() {} inline void sei() {} diff --git a/smoother/avr/io.h b/smoother/avr/io.h index 8edaaa1..8925325 100644 --- a/smoother/avr/io.h +++ b/smoother/avr/io.h @@ -1,3 +1,4 @@ +#pragma once #include struct DummyReg { @@ -31,6 +32,7 @@ extern DummyReg OCIE0A; extern DummyReg OCIE0B; extern DummyReg OCIE1A; extern DummyReg OCR1A; +extern DummyReg OCR2A; extern DummyReg PCICR; extern DummyReg PCIE0; extern DummyReg PCIE1; @@ -39,22 +41,38 @@ extern DummyReg PCMSK1; extern DummyReg SREG; extern DummyReg TCCR0A; extern DummyReg TCCR0B; -extern DummyReg TCCR0B; extern DummyReg TCCR1A; extern DummyReg TCCR1B; +extern DummyReg TCCRA; +extern DummyReg TCCR2A; +extern DummyReg TCCR2B; extern DummyReg TCNT0; extern DummyReg TIMSK0; extern DummyReg TIMSK1; extern DummyReg TOIE0; +extern DummyReg UCSR0A; +extern DummyReg UCSR0B; +extern DummyReg U2X0; +extern DummyReg UBRR0H; +extern DummyReg UBRR0L; +extern DummyReg UDR0; + + static const int COM1A0 = 0; static const int COM1A1 = 0; static const int COM1B0 = 0; static const int COM1B1 = 0; +static const int COM2A0 = 0; +static const int COM2A1 = 0; +static const int COM2B0 = 0; +static const int COM2B1 = 0; + static const int CS01 = 0; static const int CS10 = 0; static const int CS11 = 0; static const int CS12 = 0; +static const int CS22 = 0; static const int EEMWE = 0; static const int EERE = 0; static const int EEWE = 0; @@ -62,3 +80,10 @@ static const int WGM10 = 0; static const int WGM11 = 0; static const int WGM12 = 0; static const int WGM13 = 0; +static const int WGM20 = 0; +static const int WGM21 = 0; + +static const int RXEN0 = 0; +static const int TXEN0 = 0; +static const int RXCIE0 = 0; +static const int UDRIE0 = 0;