Incomplete push but working. Lots more stuff. More to come.
- NEW! An active multi-axis step smoothing algorithm that automatically adjusts dependent on step frequency. This solves the long standing issue to aliasing when moving with multiple axes. Similar in scheme to Smoothieware, but more advanced in ensuring a more consistent CPU overhead throughout all frequencies while maintaining step exactness. - Switched from Timer2 to Timer0 for the Step Port Reset Interrupt. Mainly to free up hardware PWM pins. - Seperated the direction and step pin assignments, so we can now move them to seperate ports. This means that we can more easily support 4+ axes in the future. - Added a setting for inverting the limit pins, as so many users have request. Better late than never. - Bug fix related to EEPROM calls when in cycle. The EEPROM would kill the stepper motion. Now protocol mandates that the system be either in IDLE or ALARM to access or change any settings. - Bug fix related to resuming the cycle after a spindle or dwell command if auto start has been disabled. This fix is somewhat temporary or more of a patch. Doesn’t work with a straight call-response streaming protocol, but works fine with serial buffer pre-filling streaming that most clients use. - Renamed the pin_map.h to cpu_map.h to more accurately describe what the file is. - Pushed an auto start bug fix upon re-initialization. - Much more polishing to do!
This commit is contained in:
Sonny Jeon
237
stepper.c
237
stepper.c
@ -35,6 +35,12 @@
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#define RAMP_DECEL 2
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#define MAX_AMASS_LEVEL 3
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#define AMASS_LEVEL1 (F_CPU/10000)
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#define AMASS_LEVEL2 (F_CPU/5000)
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#define AMASS_LEVEL3 (F_CPU/2500)
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// Stores the planner block Bresenham algorithm execution data for the segments in the segment
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// buffer. Normally, this buffer is partially in-use, but, for the worst case scenario, it will
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// never exceed the number of accessible stepper buffer segments (SEGMENT_BUFFER_SIZE-1).
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@ -57,7 +63,7 @@ typedef struct {
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uint16_t n_step; // Number of step events to be executed for this segment
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uint8_t st_block_index; // Stepper block data index. Uses this information to execute this segment.
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uint16_t cycles_per_tick; // Step distance traveled per ISR tick, aka step rate.
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uint8_t prescaler;
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uint8_t amass_level;
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} segment_t;
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static segment_t segment_buffer[SEGMENT_BUFFER_SIZE];
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@ -65,17 +71,19 @@ static segment_t segment_buffer[SEGMENT_BUFFER_SIZE];
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typedef struct {
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// Used by the bresenham line algorithm
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uint32_t counter_x, // Counter variables for the bresenham line tracer
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counter_y,
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counter_z;
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counter_y,
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counter_z;
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#if STEP_PULSE_DELAY > 0
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#ifdef STEP_PULSE_DELAY
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uint8_t step_bits; // Stores out_bits output to complete the step pulse delay
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#endif
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// Used by the stepper driver interrupt
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uint8_t execute_step; // Flags step execution for each interrupt.
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uint8_t step_pulse_time; // Step pulse reset time after step rise
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uint8_t out_bits; // The next stepping-bits to be output
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uint8_t step_outbits; // The next stepping-bits to be output
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uint8_t dir_outbits;
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uint32_t steps[N_AXIS];
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uint16_t step_count; // Steps remaining in line segment motion
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uint8_t exec_block_index; // Tracks the current st_block index. Change indicates new block.
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@ -120,6 +128,8 @@ typedef struct {
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static st_prep_t prep;
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static void st_config_step_timer(uint32_t cycles);
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/* BLOCK VELOCITY PROFILE DEFINITION
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__________________________
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/| |\ _________________ ^
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@ -158,6 +168,7 @@ static st_prep_t prep;
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are shown and defined in the above illustration.
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*/
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// Stepper state initialization. Cycle should only start if the st.cycle_start flag is
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// enabled. Startup init and limits call this function but shouldn't start the cycle.
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void st_wake_up()
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@ -170,20 +181,22 @@ void st_wake_up()
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}
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if (sys.state & (STATE_CYCLE | STATE_HOMING)){
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// Initialize stepper output bits
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st.out_bits = settings.invert_mask;
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st.dir_outbits = settings.dir_invert_mask;
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st.step_outbits = settings.step_invert_mask;
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// Initialize step pulse timing from settings. Here to ensure updating after re-writing.
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#ifdef STEP_PULSE_DELAY
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// Set total step pulse time after direction pin set. Ad hoc computation from oscilloscope.
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st.step_pulse_time = -(((settings.pulse_microseconds+STEP_PULSE_DELAY-2)*TICKS_PER_MICROSECOND) >> 3);
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// Set delay between direction pin write and step command.
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OCR2A = -(((settings.pulse_microseconds)*TICKS_PER_MICROSECOND) >> 3);
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OCR0A = -(((settings.pulse_microseconds)*TICKS_PER_MICROSECOND) >> 3);
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#else // Normal operation
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// Set step pulse time. Ad hoc computation from oscilloscope. Uses two's complement.
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st.step_pulse_time = -(((settings.pulse_microseconds-2)*TICKS_PER_MICROSECOND) >> 3);
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#endif
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// Enable stepper driver interrupt
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// Enable Stepper Driver Interrupt
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TCCR1B = (TCCR1B & ~(0x07<<CS10)) | (1<<CS10); // Set prescaler
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TIMSK1 |= (1<<OCIE1A);
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}
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}
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@ -192,10 +205,8 @@ void st_wake_up()
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// Stepper shutdown
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void st_go_idle()
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{
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// Disable stepper driver interrupt. Allow Timer0 to finish. It will disable itself.
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// Disable Timer1 Stepper Driver Interrupt. Allow Timer0 to finish. It will disable itself.
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TIMSK1 &= ~(1<<OCIE1A);
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// TIMSK2 &= ~(1<<OCIE2A); // Disable Timer2 interrupt
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// TCCR2B = 0; // Disable Timer2
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busy = false;
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// Disable steppers only upon system alarm activated or by user setting to not be kept enabled.
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@ -242,19 +253,20 @@ ISR(TIMER1_COMPA_vect)
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if (busy) { return; } // The busy-flag is used to avoid reentering this interrupt
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// Set the direction pins a couple of nanoseconds before we step the steppers
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STEPPING_PORT = (STEPPING_PORT & ~DIRECTION_MASK) | (st.out_bits & DIRECTION_MASK);
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DIRECTION_PORT = (DIRECTION_PORT & ~DIRECTION_MASK) | (st.dir_outbits & DIRECTION_MASK);
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// Then pulse the stepping pins
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#ifdef STEP_PULSE_DELAY
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st.step_bits = (STEPPING_PORT & ~STEP_MASK) | st.out_bits; // Store out_bits to prevent overwriting.
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st.step_bits = (STEPPING_PORT & ~STEP_MASK) | st.step_outbits; // Store out_bits to prevent overwriting.
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#else // Normal operation
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STEPPING_PORT = (STEPPING_PORT & ~STEP_MASK) | st.out_bits;
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STEPPING_PORT = (STEPPING_PORT & ~STEP_MASK) | st.step_outbits;
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#endif
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// Enable step pulse reset timer so that The Stepper Port Reset Interrupt can reset the signal after
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// exactly settings.pulse_microseconds microseconds, independent of the main Timer1 prescaler.
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TCNT2 = st.step_pulse_time; // Reload timer counter
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TCCR2B = (1<<CS21); // Begin timer2. Full speed, 1/8 prescaler
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TCNT0 = st.step_pulse_time; // Reload Timer0 counter
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TCCR0B = (1<<CS21); // Begin Timer0. Full speed, 1/8 prescaler
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busy = true;
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sei(); // Re-enable interrupts to allow Stepper Port Reset Interrupt to fire on-time.
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// NOTE: The remaining code in this ISR will finish before returning to main program.
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@ -266,7 +278,7 @@ ISR(TIMER1_COMPA_vect)
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// Initialize new step segment and load number of steps to execute
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st.exec_segment = &segment_buffer[segment_buffer_tail];
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// Initialize step segment timing per step and load number of steps to execute.
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TCCR1B = (TCCR1B & ~(0x07<<CS10)) | (st.exec_segment->prescaler<<CS10);
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// TCCR1B = (TCCR1B & ~(0x07<<CS10)) | (st.exec_segment->prescaler<<CS10);
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OCR1A = st.exec_segment->cycles_per_tick;
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st.step_count = st.exec_segment->n_step; // NOTE: Can sometimes be zero when moving slow.
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// If the new segment starts a new planner block, initialize stepper variables and counters.
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@ -274,11 +286,15 @@ ISR(TIMER1_COMPA_vect)
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if ( st.exec_block_index != st.exec_segment->st_block_index ) {
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st.exec_block_index = st.exec_segment->st_block_index;
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st.exec_block = &st_block_buffer[st.exec_block_index];
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st.dir_outbits = st.exec_block->direction_bits ^ settings.dir_invert_mask;
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// Initialize Bresenham line and distance counters
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st.counter_x = (st.exec_block->step_event_count >> 1);
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st.counter_y = st.counter_x;
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st.counter_z = st.counter_x;
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st.counter_z = st.counter_x;
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}
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st.steps[X_AXIS] = st.exec_block->steps[X_AXIS] >> st.exec_segment->amass_level;
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st.steps[Y_AXIS] = st.exec_block->steps[Y_AXIS] >> st.exec_segment->amass_level;
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st.steps[Z_AXIS] = st.exec_block->steps[Z_AXIS] >> st.exec_segment->amass_level;
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} else {
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// Segment buffer empty. Shutdown.
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st_go_idle();
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@ -287,46 +303,43 @@ ISR(TIMER1_COMPA_vect)
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}
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}
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// Reset out_bits and reload direction bits
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st.out_bits = st.exec_block->direction_bits;
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// Reset step out bits.
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st.step_outbits = 0;
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// Execute step displacement profile by Bresenham line algorithm
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if (st.step_count > 0) {
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st.step_count--; // Decrement step events count
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st.counter_x += st.steps[X_AXIS];
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if (st.counter_x > st.exec_block->step_event_count) {
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st.step_outbits |= (1<<X_STEP_BIT);
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st.counter_x -= st.exec_block->step_event_count;
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if (st.exec_block->direction_bits & (1<<X_DIRECTION_BIT)) { sys.position[X_AXIS]--; }
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else { sys.position[X_AXIS]++; }
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}
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st.counter_y += st.steps[Y_AXIS];
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if (st.counter_y > st.exec_block->step_event_count) {
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st.step_outbits |= (1<<Y_STEP_BIT);
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st.counter_y -= st.exec_block->step_event_count;
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if (st.exec_block->direction_bits & (1<<Y_DIRECTION_BIT)) { sys.position[Y_AXIS]--; }
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else { sys.position[Y_AXIS]++; }
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}
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st.counter_z += st.steps[Z_AXIS];
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if (st.counter_z > st.exec_block->step_event_count) {
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st.step_outbits |= (1<<Z_STEP_BIT);
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st.counter_z -= st.exec_block->step_event_count;
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if (st.exec_block->direction_bits & (1<<Z_DIRECTION_BIT)) { sys.position[Z_AXIS]--; }
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else { sys.position[Z_AXIS]++; }
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}
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st.counter_x += st.exec_block->steps[X_AXIS];
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if (st.counter_x > st.exec_block->step_event_count) {
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st.out_bits |= (1<<X_STEP_BIT);
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st.counter_x -= st.exec_block->step_event_count;
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if (st.out_bits & (1<<X_DIRECTION_BIT)) { sys.position[X_AXIS]--; }
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else { sys.position[X_AXIS]++; }
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}
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st.counter_y += st.exec_block->steps[Y_AXIS];
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if (st.counter_y > st.exec_block->step_event_count) {
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st.out_bits |= (1<<Y_STEP_BIT);
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st.counter_y -= st.exec_block->step_event_count;
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if (st.out_bits & (1<<Y_DIRECTION_BIT)) { sys.position[Y_AXIS]--; }
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else { sys.position[Y_AXIS]++; }
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}
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st.counter_z += st.exec_block->steps[Z_AXIS];
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if (st.counter_z > st.exec_block->step_event_count) {
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st.out_bits |= (1<<Z_STEP_BIT);
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st.counter_z -= st.exec_block->step_event_count;
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if (st.out_bits & (1<<Z_DIRECTION_BIT)) { sys.position[Z_AXIS]--; }
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else { sys.position[Z_AXIS]++; }
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}
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// During a homing cycle, lock out and prevent desired axes from moving.
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if (sys.state == STATE_HOMING) { st.out_bits &= sys.homing_axis_lock; }
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}
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// During a homing cycle, lock out and prevent desired axes from moving.
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if (sys.state == STATE_HOMING) { st.step_outbits &= sys.homing_axis_lock; }
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st.step_count--; // Decrement step events count
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if (st.step_count == 0) {
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// Segment is complete. Discard current segment and advance segment indexing.
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st.exec_segment = NULL;
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if ( ++segment_buffer_tail == SEGMENT_BUFFER_SIZE) { segment_buffer_tail = 0; }
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}
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st.out_bits ^= settings.invert_mask; // Apply step port invert mask
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st.step_outbits ^= settings.step_invert_mask; // Apply step port invert mask
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busy = false;
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// SPINDLE_ENABLE_PORT ^= 1<<SPINDLE_ENABLE_BIT;
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}
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@ -335,12 +348,6 @@ ISR(TIMER1_COMPA_vect)
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/* The Stepper Port Reset Interrupt: Timer0 OVF interrupt handles the falling edge of the step
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pulse. This should always trigger before the next Timer2 COMPA interrupt and independently
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finish, if Timer2 is disabled after completing a move. */
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// ISR(TIMER0_OVF_vect)
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// {
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// STEPPING_PORT = (STEPPING_PORT & ~STEP_MASK) | (settings.invert_mask & STEP_MASK);
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// TCCR0B = 0; // Disable timer until needed.
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// }
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// This interrupt is set up by ISR_TIMER1_COMPAREA when it sets the motor port bits. It resets
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// the motor port after a short period (settings.pulse_microseconds) completing one step cycle.
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@ -348,11 +355,11 @@ ISR(TIMER1_COMPA_vect)
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// a few microseconds, if they execute right before one another. Not a big deal, but can
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// cause issues at high step rates if another high frequency asynchronous interrupt is
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// added to Grbl.
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ISR(TIMER2_OVF_vect)
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ISR(TIMER0_OVF_vect)
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{
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// Reset stepping pins (leave the direction pins)
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STEPPING_PORT = (STEPPING_PORT & ~STEP_MASK) | (settings.invert_mask & STEP_MASK);
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TCCR2B = 0; // Disable Timer2 to prevent re-entering this interrupt when it's not needed.
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STEPPING_PORT = (STEPPING_PORT & ~STEP_MASK) | (settings.step_invert_mask & STEP_MASK);
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TCCR0B = 0; // Disable Timer0 to prevent re-entering this interrupt when it's not needed.
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}
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@ -362,7 +369,7 @@ ISR(TIMER2_OVF_vect)
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// will then trigger after the appropriate settings.pulse_microseconds, as in normal operation.
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// The new timing between direction, step pulse, and step complete events are setup in the
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// st_wake_up() routine.
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ISR(TIMER2_COMPA_vect)
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ISR(TIMER0_COMPA_vect)
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{
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STEPPING_PORT = st.step_bits; // Begin step pulse.
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}
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@ -387,12 +394,14 @@ void st_reset()
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// Initialize and start the stepper motor subsystem
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void st_init()
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{
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// Configure directions of interface pins
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STEPPING_DDR |= STEPPING_MASK;
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STEPPING_PORT = (STEPPING_PORT & ~STEPPING_MASK) | settings.invert_mask;
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// Configure step and direction interface pins
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STEPPING_DDR |= STEP_MASK;
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STEPPING_PORT = (STEPPING_PORT & ~STEP_MASK) | settings.step_invert_mask;
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STEPPERS_DISABLE_DDR |= 1<<STEPPERS_DISABLE_BIT;
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DIRECTION_DDR |= DIRECTION_MASK;
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DIRECTION_PORT = (DIRECTION_PORT & ~DIRECTION_MASK) | settings.dir_invert_mask;
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// Configure Timer 1
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// Configure Timer 1: Stepper Driver Interrupt
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TCCR1B &= ~(1<<WGM13); // waveform generation = 0100 = CTC
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TCCR1B |= (1<<WGM12);
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TCCR1A &= ~(1<<WGM11);
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@ -401,12 +410,13 @@ void st_init()
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TCCR1A &= ~(3<<COM1B0);
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TCCR1B = (TCCR1B & ~(0x07<<CS10)) | (1<<CS10);
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// Configure Timer 2
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TCCR2A = 0; // Normal operation
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TCCR2B = 0; // Disable timer until needed.
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TIMSK2 |= (1<<TOIE2); // Enable Timer2 Overflow interrupt
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// Configure Timer 0: Stepper Port Reset Interrupt
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TIMSK0 &= ~(1<<TOIE0);
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TCCR0A = 0; // Normal operation
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TCCR0B = 0; // Disable Timer0 until needed
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TIMSK0 |= (1<<TOIE0); // Enable Timer0 overflow interrupt
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#ifdef STEP_PULSE_DELAY
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TIMSK2 |= (1<<OCIE2A); // Enable Timer2 Compare Match A interrupt
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TIMSK0 |= (1<<OCIE0A); // Enable Timer0 Compare Match A interrupt
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#endif
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// Start in the idle state, but first wake up to check for keep steppers enabled option.
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@ -510,10 +520,17 @@ void st_prep_buffer()
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// when the segment buffer completes the planner block, it may be discarded immediately.
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st_prep_block = &st_block_buffer[prep.st_block_index];
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st_prep_block->direction_bits = pl_block->direction_bits;
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st_prep_block->steps[X_AXIS] = pl_block->steps[X_AXIS];
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st_prep_block->steps[Y_AXIS] = pl_block->steps[Y_AXIS];
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st_prep_block->steps[Z_AXIS] = pl_block->steps[Z_AXIS];
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st_prep_block->step_event_count = pl_block->step_event_count;
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#ifdef ACTIVE_MULTI_AXIS_STEP_SMOOTHING
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st_prep_block->steps[X_AXIS] = pl_block->steps[X_AXIS] << MAX_AMASS_LEVEL;
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st_prep_block->steps[Y_AXIS] = pl_block->steps[Y_AXIS] << MAX_AMASS_LEVEL;
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st_prep_block->steps[Z_AXIS] = pl_block->steps[Z_AXIS] << MAX_AMASS_LEVEL;
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st_prep_block->step_event_count = pl_block->step_event_count << MAX_AMASS_LEVEL;
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#else
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st_prep_block->steps[X_AXIS] = pl_block->steps[X_AXIS];
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st_prep_block->steps[Y_AXIS] = pl_block->steps[Y_AXIS];
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st_prep_block->steps[Z_AXIS] = pl_block->steps[Z_AXIS];
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st_prep_block->step_event_count = pl_block->step_event_count;
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#endif
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// Initialize segment buffer data for generating the segments.
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prep.steps_remaining = pl_block->step_event_count;
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@ -678,11 +695,26 @@ void st_prep_buffer()
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uint32_t cycles;
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float steps_remaining = prep.step_per_mm*mm_remaining;
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float inv_rate = dt/(prep.steps_remaining-steps_remaining);
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cycles = ceil( (TICKS_PER_MICROSECOND*1000000*60)*inv_rate ); // (ftol_mult*step/isr_tic)
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// Compute number of steps to execute and segment step phase correction.
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prep_segment->n_step = ceil(prep.steps_remaining)-ceil(steps_remaining);
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prep_segment->n_step = ceil(prep.steps_remaining)-ceil(steps_remaining);
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float inv_rate = dt/(prep.steps_remaining-steps_remaining);
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cycles = ceil( (TICKS_PER_MICROSECOND*1000000*60)*inv_rate ); // (cycles/step)
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#ifdef ACTIVE_MULTI_AXIS_STEP_SMOOTHING
|
||||
// Compute step timing and multi-axis smoothing level.
|
||||
// NOTE: Only one prescalar is required with AMASS enabled.
|
||||
if (cycles > AMASS_LEVEL1) {
|
||||
if (cycles > AMASS_LEVEL2) {
|
||||
if (cycles > AMASS_LEVEL3) { prep_segment->amass_level = 3; }
|
||||
else { prep_segment->amass_level = 2; }
|
||||
} else { prep_segment->amass_level = 1; }
|
||||
cycles >>= prep_segment->amass_level;
|
||||
prep_segment->n_step <<= prep_segment->amass_level;
|
||||
} else { prep_segment->amass_level = 0; }
|
||||
if (cycles < (1UL << 16)) { prep_segment->cycles_per_tick = cycles; }
|
||||
else { prep_segment->cycles_per_tick = 0xffff; } // Just set the slowest speed possible. (4.1ms @ 16MHz)
|
||||
#endif
|
||||
|
||||
// Determine end of segment conditions. Setup initial conditions for next segment.
|
||||
if (mm_remaining > prep.mm_complete) {
|
||||
@ -715,29 +747,6 @@ void st_prep_buffer()
|
||||
}
|
||||
}
|
||||
|
||||
// TODO: Compile-time checks to what prescalers need to be compiled in.
|
||||
if (cycles < (1UL << 16)) { // < 65536 (4.1ms @ 16MHz)
|
||||
prep_segment->prescaler = 1; // prescaler: 0
|
||||
prep_segment->cycles_per_tick = cycles;
|
||||
} else {
|
||||
prep_segment->prescaler = 2; // prescaler: 8
|
||||
if (cycles < (1UL << 19)) { // < 524288 (32.8ms@16MHz)
|
||||
prep_segment->cycles_per_tick = cycles >> 3;
|
||||
// } else if (cycles < (1UL << 22)) { // < 4194304 (262ms@16MHz)
|
||||
// prep_segment->prescaler = 3; // prescaler: 64
|
||||
// prep_segment->cycles_per_tick = cycles >> 6;
|
||||
// } else if (cycles < (1UL << 24)) { // < 16777216 (1.05sec@16MHz)
|
||||
// prep_segment->prescaler = 4; // prescaler: 256
|
||||
// prep_segment->cycles_per_tick = (cycles >> 8);
|
||||
// } else {
|
||||
// prep_segment->prescaler = 5; // prescaler: 1024
|
||||
// if (cycles < (1UL << 26)) { // < 67108864 (4.19sec@16MHz)
|
||||
// prep_segment->cycles_per_tick = (cycles >> 10);
|
||||
} else { // Just set the slowest speed possible.
|
||||
prep_segment->cycles_per_tick = 0xffff;
|
||||
}
|
||||
}
|
||||
|
||||
// New step segment initialization completed. Increment segment buffer indices.
|
||||
segment_buffer_head = segment_next_head;
|
||||
if ( ++segment_next_head == SEGMENT_BUFFER_SIZE ) { segment_next_head = 0; }
|
||||
@ -776,3 +785,31 @@ void st_prep_buffer()
|
||||
we know when the plan is feasible in the context of what's already in the code and not
|
||||
require too much more code?
|
||||
*/
|
||||
|
||||
// static void st_config_step_timer(uint32_t cycles)
|
||||
// {
|
||||
// if (cycles < (1UL << 16)) { // < 65536 (4.1ms @ 16MHz)
|
||||
// prep_segment->prescaler = 1; // prescaler: 0
|
||||
// prep_segment->cycles_per_tick = cycles;
|
||||
// } else {
|
||||
// prep_segment->prescaler = 2; // prescaler: 8
|
||||
// if (cycles < (1UL << 19)) { // < 524288 (32.8ms@16MHz)
|
||||
// prep_segment->cycles_per_tick = cycles >> 3;
|
||||
//
|
||||
// // } else if (cycles < (1UL << 22)) { // < 4194304 (262ms@16MHz)
|
||||
// // prep_segment->prescaler = 3; // prescaler: 64
|
||||
// // prep_segment->cycles_per_tick = cycles >> 6;
|
||||
// // } else if (cycles < (1UL << 24)) { // < 16777216 (1.05sec@16MHz)
|
||||
// // prep_segment->prescaler = 4; // prescaler: 256
|
||||
// // prep_segment->cycles_per_tick = (cycles >> 8);
|
||||
// // } else {
|
||||
// // prep_segment->prescaler = 5; // prescaler: 1024
|
||||
// // if (cycles < (1UL << 26)) { // < 67108864 (4.19sec@16MHz)
|
||||
// // prep_segment->cycles_per_tick = (cycles >> 10);
|
||||
//
|
||||
// } else { // Just set the slowest speed possible.
|
||||
// prep_segment->cycles_per_tick = 0xffff;
|
||||
// }
|
||||
// printString("X");
|
||||
// }
|
||||
// }
|
||||
Reference in New Issue
Block a user