ManuelW/grbl-LPC-CoreXY
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added the new, more optimal pin configuration

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Simen Svale Skogsrud 2011-02-03 09:57:10 +01:00
parent dad9db1b02
commit 420641d13d
1 changed files with 56 additions and 22 deletions
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78
config.h
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@ -30,32 +30,66 @@
#define BAUD_RATE 9600 #define BAUD_RATE 9600
//#define BAUD_RATE 115200 //#define BAUD_RATE 115200
#define STEPPERS_ENABLE_DDR DDRD // Default pin-assignments from Grbl 0.5
#define STEPPERS_ENABLE_PORT PORTD
#define STEPPERS_ENABLE_BIT 2
#define STEPPING_DDR DDRC // #define STEPPERS_ENABLE_DDR DDRD
#define STEPPING_PORT PORTC // #define STEPPERS_ENABLE_PORT PORTD
#define X_STEP_BIT 0 // #define STEPPERS_ENABLE_BIT 2
#define Y_STEP_BIT 1 //
#define Z_STEP_BIT 2 // #define STEPPING_DDR DDRC
#define X_DIRECTION_BIT 3 // #define STEPPING_PORT PORTC
#define Y_DIRECTION_BIT 4 // #define X_STEP_BIT 0
#define Z_DIRECTION_BIT 5 // #define Y_STEP_BIT 1
// #define Z_STEP_BIT 2
// #define X_DIRECTION_BIT 3
// #define Y_DIRECTION_BIT 4
// #define Z_DIRECTION_BIT 5
//
// #define LIMIT_DDR DDRD
// #define LIMIT_PORT PORTD
// #define X_LIMIT_BIT 3
// #define Y_LIMIT_BIT 4
// #define Z_LIMIT_BIT 5
//
// #define SPINDLE_ENABLE_DDR DDRD
// #define SPINDLE_ENABLE_PORT PORTD
// #define SPINDLE_ENABLE_BIT 6
//
// #define SPINDLE_DIRECTION_DDR DDRD
// #define SPINDLE_DIRECTION_PORT PORTD
// #define SPINDLE_DIRECTION_BIT 7
//
//
#define LIMIT_DDR DDRD
#define LIMIT_PORT PORTD
#define X_LIMIT_BIT 3
#define Y_LIMIT_BIT 4
#define Z_LIMIT_BIT 5
#define SPINDLE_ENABLE_DDR DDRD // Updated default pin-assignments from 0.6 onwards
#define SPINDLE_ENABLE_PORT PORTD
#define SPINDLE_ENABLE_BIT 6
#define SPINDLE_DIRECTION_DDR DDRD #define STEPPERS_ENABLE_DDR DDRB
#define SPINDLE_DIRECTION_PORT PORTD #define STEPPERS_ENABLE_PORT PORTB
#define SPINDLE_DIRECTION_BIT 7 #define STEPPERS_ENABLE_BIT 0
#define STEPPING_DDR DDRD
#define STEPPING_PORT PORTD
#define X_STEP_BIT 2
#define Y_STEP_BIT 3
#define Z_STEP_BIT 4
#define X_DIRECTION_BIT 5
#define Y_DIRECTION_BIT 6
#define Z_DIRECTION_BIT 7
#define LIMIT_DDR DDRB
#define LIMIT_PORT PORTB
#define X_LIMIT_BIT 1
#define Y_LIMIT_BIT 2
#define Z_LIMIT_BIT 3
#define SPINDLE_ENABLE_DDR DDRB
#define SPINDLE_ENABLE_PORT PORTB
#define SPINDLE_ENABLE_BIT 4
#define SPINDLE_DIRECTION_DDR DDRB
#define SPINDLE_DIRECTION_PORT PORTB
#define SPINDLE_DIRECTION_BIT 5
// Version of the EEPROM data. Will be used to migrate existing data from older versions of Grbl // Version of the EEPROM data. Will be used to migrate existing data from older versions of Grbl