388 lines
16 KiB
C
388 lines
16 KiB
C
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/*
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stepper.c - stepper motor driver: executes motion plans using stepper motors
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Part of Grbl
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Copyright (c) 2011-2013 Sungeun K. Jeon
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Copyright (c) 2009-2011 Simen Svale Skogsrud
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Grbl is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Grbl is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Grbl. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* The timer calculations of this module informed by the 'RepRap cartesian firmware' by Zack Smith
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and Philipp Tiefenbacher. */
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#include <avr/interrupt.h>
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#include "stepper.h"
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#include "config.h"
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#include "settings.h"
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#include "planner.h"
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// Some useful constants
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#define TICKS_PER_MICROSECOND (F_CPU/1000000)
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#define CRUISE_RAMP 0
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#define ACCEL_RAMP 1
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#define DECEL_RAMP 2
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// Stepper state variable. Contains running data and trapezoid variables.
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typedef struct {
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// Used by the bresenham line algorithm
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int32_t counter_x, // Counter variables for the bresenham line tracer
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counter_y,
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counter_z;
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int32_t event_count; // Total event count. Retained for feed holds.
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int32_t step_events_remaining; // Steps remaining in motion
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// Used by Pramod Ranade inverse time algorithm
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int32_t delta_d; // Ranade distance traveled per interrupt tick
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int32_t d_counter; // Ranade distance traveled since last step event
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uint8_t ramp_count; // Acceleration interrupt tick counter.
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uint8_t ramp_type; // Ramp type variable.
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uint8_t execute_step; // Flags step execution for each interrupt.
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} stepper_t;
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static stepper_t st;
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static block_t *current_block; // A pointer to the block currently being traced
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// Used by the stepper driver interrupt
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static uint8_t step_pulse_time; // Step pulse reset time after step rise
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static uint8_t out_bits; // The next stepping-bits to be output
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// NOTE: If the main interrupt is guaranteed to be complete before the next interrupt, then
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// this blocking variable is no longer needed. Only here for safety reasons.
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static volatile uint8_t busy; // True when "Stepper Driver Interrupt" is being serviced. Used to avoid retriggering that handler.
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// __________________________
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// /| |\ _________________ ^
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// / | | \ /| |\ |
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// / | | \ / | | \ s
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// / | | | | | \ p
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// / | | | | | \ e
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// +-----+------------------------+---+--+---------------+----+ e
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// | BLOCK 1 | BLOCK 2 | d
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//
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// time ----->
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//
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// The trapezoid is the shape the speed curve over time. It starts at block->initial_rate, accelerates by block->rate_delta
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// until reaching cruising speed block->nominal_rate, and/or until step_events_remaining reaches block->decelerate_after
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// after which it decelerates until the block is completed. The driver uses constant acceleration, which is applied as
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// +/- block->rate_delta velocity increments by the midpoint rule at each ACCELERATION_TICKS_PER_SECOND.
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// Stepper state initialization. Cycle should only start if the st.cycle_start flag is
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// enabled. Startup init and limits call this function but shouldn't start the cycle.
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void st_wake_up()
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{
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// Enable steppers by resetting the stepper disable port
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if (bit_istrue(settings.flags,BITFLAG_INVERT_ST_ENABLE)) {
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STEPPERS_DISABLE_PORT |= (1<<STEPPERS_DISABLE_BIT);
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} else {
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STEPPERS_DISABLE_PORT &= ~(1<<STEPPERS_DISABLE_BIT);
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}
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if (sys.state == STATE_CYCLE) {
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// Initialize stepper output bits
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out_bits = settings.invert_mask;
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// Initialize step pulse timing from settings.
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step_pulse_time = -(((settings.pulse_microseconds-2)*TICKS_PER_MICROSECOND) >> 3);
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// Enable stepper driver interrupt
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st.execute_step = false;
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TCNT2 = 0; // Clear Timer2
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TIMSK2 |= (1<<OCIE2A); // Enable Timer2 Compare Match A interrupt
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TCCR2B = (1<<CS21); // Begin Timer2. Full speed, 1/8 prescaler
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}
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}
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// Stepper shutdown
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void st_go_idle()
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{
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// Disable stepper driver interrupt. Allow Timer0 to finish. It will disable itself.
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TIMSK2 &= ~(1<<OCIE2A); // Disable Timer2 interrupt
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TCCR2B = 0; // Disable Timer2
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busy = false;
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// Disable steppers only upon system alarm activated or by user setting to not be kept enabled.
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if ((settings.stepper_idle_lock_time != 0xff) || bit_istrue(sys.execute,EXEC_ALARM)) {
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// Force stepper dwell to lock axes for a defined amount of time to ensure the axes come to a complete
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// stop and not drift from residual inertial forces at the end of the last movement.
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delay_ms(settings.stepper_idle_lock_time);
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if (bit_istrue(settings.flags,BITFLAG_INVERT_ST_ENABLE)) {
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STEPPERS_DISABLE_PORT &= ~(1<<STEPPERS_DISABLE_BIT);
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} else {
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STEPPERS_DISABLE_PORT |= (1<<STEPPERS_DISABLE_BIT);
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}
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}
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}
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// "The Stepper Driver Interrupt" - This timer interrupt is the workhorse of Grbl. It is based
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// on the Pramod Ranade inverse time stepper algorithm, where a timer ticks at a constant
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// frequency and uses time-distance counters to track when its the approximate time for any
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// step event. However, the Ranade algorithm, as described, is susceptible to numerical round-off,
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// meaning that some axes steps may not execute for a given multi-axis motion.
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// Grbl's algorithm slightly differs by using a single Ranade time-distance counter to manage
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// a Bresenham line algorithm for multi-axis step events which ensures the number of steps for
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// each axis are executed exactly. In other words, it uses a Bresenham within a Bresenham algorithm,
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// where one tracks time(Ranade) and the other steps.
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// This interrupt pops blocks from the block_buffer and executes them by pulsing the stepper pins
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// appropriately. It is supported by The Stepper Port Reset Interrupt which it uses to reset the
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// stepper port after each pulse. The bresenham line tracer algorithm controls all three stepper
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// outputs simultaneously with these two interrupts.
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//
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// NOTE: Average time in this ISR is: 5 usec iterating timers only, 20-25 usec with step event, or
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// 15 usec when popping a block. So, ensure Ranade frequency and step pulse times work with this.
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ISR(TIMER2_COMPA_vect)
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{
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// SPINDLE_ENABLE_PORT ^= 1<<SPINDLE_ENABLE_BIT; // Debug: Used to time ISR
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if (busy) { return; } // The busy-flag is used to avoid reentering this interrupt
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// Pulse stepper port pins, if flagged. New block dir will always be set one timer tick
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// before any step pulse due to algorithm design.
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if (st.execute_step) {
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st.execute_step = false;
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STEPPING_PORT = ( STEPPING_PORT & ~(DIRECTION_MASK | STEP_MASK) ) | out_bits;
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TCNT0 = step_pulse_time; // Reload Timer0 counter.
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TCCR0B = (1<<CS21); // Begin Timer0. Full speed, 1/8 prescaler
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}
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busy = true;
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sei(); // Re-enable interrupts. This ISR will still finish before returning to main program.
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// If there is no current block, attempt to pop one from the buffer
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if (current_block == NULL) {
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// Anything in the buffer? If so, initialize next motion.
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current_block = plan_get_current_block();
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if (current_block != NULL) {
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// By algorithm design, the loading of the next block never coincides with a step event,
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// since there is always one Ranade timer tick before a step event occurs. This means
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// that the Bresenham counter math never is performed at the same time as the loading
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// of a block, hence helping minimize total time spent in this interrupt.
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// Initialize direction bits for block
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out_bits = current_block->direction_bits ^ settings.invert_mask;
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st.execute_step = true; // Set flag to set direction bits.
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// Initialize Bresenham variables
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st.counter_x = (current_block->step_event_count >> 1);
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st.counter_y = st.counter_x;
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st.counter_z = st.counter_x;
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st.event_count = current_block->step_event_count;
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st.step_events_remaining = st.event_count;
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// During feed hold, do not update Ranade counter, rate, or ramp type. Keep decelerating.
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if (sys.state == STATE_CYCLE) {
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// Initialize Ranade variables
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st.d_counter = current_block->d_next;
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st.delta_d = current_block->initial_rate;
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st.ramp_count = ISR_TICKS_PER_ACCELERATION_TICK/2;
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// Initialize ramp type.
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if (st.step_events_remaining == current_block->decelerate_after) { st.ramp_type = DECEL_RAMP; }
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else if (st.delta_d == current_block->nominal_rate) { st.ramp_type = CRUISE_RAMP; }
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else { st.ramp_type = ACCEL_RAMP; }
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}
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} else {
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st_go_idle();
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bit_true(sys.execute,EXEC_CYCLE_STOP); // Flag main program for cycle end
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return; // Nothing to do but exit.
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}
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}
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// Adjust inverse time counter for ac/de-celerations
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if (st.ramp_type) {
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// Tick acceleration ramp counter
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st.ramp_count--;
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if (st.ramp_count == 0) {
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st.ramp_count = ISR_TICKS_PER_ACCELERATION_TICK; // Reload ramp counter
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if (st.ramp_type == ACCEL_RAMP) { // Adjust velocity for acceleration
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st.delta_d += current_block->rate_delta;
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if (st.delta_d >= current_block->nominal_rate) { // Reached cruise state.
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st.ramp_type = CRUISE_RAMP;
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st.delta_d = current_block->nominal_rate; // Set cruise velocity
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}
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} else if (st.ramp_type == DECEL_RAMP) { // Adjust velocity for deceleration
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if (st.delta_d > current_block->rate_delta) {
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st.delta_d -= current_block->rate_delta;
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} else {
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st.delta_d >>= 1; // Integer divide by 2 until complete. Also prevents overflow.
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}
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}
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}
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}
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// Iterate Pramod Ranade inverse time counter. Triggers each Bresenham step event.
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if (st.delta_d < MINIMUM_STEP_RATE) { st.d_counter -= MINIMUM_STEP_RATE; }
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else { st.d_counter -= st.delta_d; }
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// Execute Bresenham step event, when it's time to do so.
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if (st.d_counter < 0) {
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st.d_counter += current_block->d_next;
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// Check for feed hold state and execute accordingly.
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if (sys.state == STATE_HOLD) {
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if (st.ramp_type != DECEL_RAMP) {
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st.ramp_type = DECEL_RAMP;
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st.ramp_count = ISR_TICKS_PER_ACCELERATION_TICK/2;
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}
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if (st.delta_d <= current_block->rate_delta) {
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st_go_idle();
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bit_true(sys.execute,EXEC_CYCLE_STOP);
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return;
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}
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}
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// TODO: Vary Bresenham resolution for smoother motions or enable faster step rates (>20kHz).
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out_bits = current_block->direction_bits; // Reset out_bits and reload direction bits
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st.execute_step = true;
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// Execute step displacement profile by Bresenham line algorithm
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st.counter_x -= current_block->steps[X_AXIS];
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if (st.counter_x < 0) {
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out_bits |= (1<<X_STEP_BIT);
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st.counter_x += st.event_count;
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if (out_bits & (1<<X_DIRECTION_BIT)) { sys.position[X_AXIS]--; }
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else { sys.position[X_AXIS]++; }
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}
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st.counter_y -= current_block->steps[Y_AXIS];
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if (st.counter_y < 0) {
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out_bits |= (1<<Y_STEP_BIT);
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st.counter_y += st.event_count;
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if (out_bits & (1<<Y_DIRECTION_BIT)) { sys.position[Y_AXIS]--; }
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else { sys.position[Y_AXIS]++; }
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}
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st.counter_z -= current_block->steps[Z_AXIS];
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if (st.counter_z < 0) {
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out_bits |= (1<<Z_STEP_BIT);
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st.counter_z += st.event_count;
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if (out_bits & (1<<Z_DIRECTION_BIT)) { sys.position[Z_AXIS]--; }
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else { sys.position[Z_AXIS]++; }
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}
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// Check step events for trapezoid change or end of block.
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st.step_events_remaining--; // Decrement step events count
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if (st.step_events_remaining) {
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if (st.ramp_type != DECEL_RAMP) {
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// Acceleration and cruise handled by ramping. Just check for deceleration.
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if (st.step_events_remaining <= current_block->decelerate_after) {
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st.ramp_type = DECEL_RAMP;
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if (st.step_events_remaining == current_block->decelerate_after) {
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if (st.delta_d == current_block->nominal_rate) {
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st.ramp_count = ISR_TICKS_PER_ACCELERATION_TICK/2; // Set ramp counter for trapezoid
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} else {
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st.ramp_count = ISR_TICKS_PER_ACCELERATION_TICK-st.ramp_count; // Set ramp counter for triangle
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}
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}
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}
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}
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} else {
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// If current block is finished, reset pointer
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current_block = NULL;
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plan_discard_current_block();
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}
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out_bits ^= settings.invert_mask; // Apply step port invert mask
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}
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busy = false;
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// SPINDLE_ENABLE_PORT ^= 1<<SPINDLE_ENABLE_BIT;
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}
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// The Stepper Port Reset Interrupt: Timer0 OVF interrupt handles the falling edge of the
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// step pulse. This should always trigger before the next Timer2 COMPA interrupt and independently
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// finish, if Timer2 is disabled after completing a move.
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ISR(TIMER0_OVF_vect)
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{
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STEPPING_PORT = (STEPPING_PORT & ~STEP_MASK) | (settings.invert_mask & STEP_MASK);
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TCCR0B = 0; // Disable timer until needed.
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}
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// Reset and clear stepper subsystem variables
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void st_reset()
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{
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memset(&st, 0, sizeof(st));
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current_block = NULL;
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busy = false;
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}
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// Initialize and start the stepper motor subsystem
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void st_init()
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{
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// Configure directions of interface pins
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STEPPING_DDR |= STEPPING_MASK;
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STEPPING_PORT = (STEPPING_PORT & ~STEPPING_MASK) | settings.invert_mask;
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||
|
|
STEPPERS_DISABLE_DDR |= 1<<STEPPERS_DISABLE_BIT;
|
||
|
|
|
||
|
|
// Configure Timer 2
|
||
|
|
TIMSK2 &= ~(1<<OCIE2A); // Disable Timer2 interrupt while configuring it
|
||
|
|
TCCR2B = 0; // Disable Timer2 until needed
|
||
|
|
TCNT2 = 0; // Clear Timer2 counter
|
||
|
|
TCCR2A = (1<<WGM21); // Set CTC mode
|
||
|
|
OCR2A = (F_CPU/ISR_TICKS_PER_SECOND)/8 - 1; // Set Timer2 CTC rate
|
||
|
|
|
||
|
|
// Configure Timer 0
|
||
|
|
TIMSK0 &= ~(1<<TOIE0);
|
||
|
|
TCCR0A = 0; // Normal operation
|
||
|
|
TCCR0B = 0; // Disable Timer0 until needed
|
||
|
|
TIMSK0 |= (1<<TOIE0); // Enable overflow interrupt
|
||
|
|
|
||
|
|
// Start in the idle state, but first wake up to check for keep steppers enabled option.
|
||
|
|
st_wake_up();
|
||
|
|
st_go_idle();
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
// Planner external interface to start stepper interrupt and execute the blocks in queue. Called
|
||
|
|
// by the main program functions: planner auto-start and run-time command execution.
|
||
|
|
void st_cycle_start()
|
||
|
|
{
|
||
|
|
if (sys.state == STATE_QUEUED) {
|
||
|
|
sys.state = STATE_CYCLE;
|
||
|
|
st_wake_up();
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
// Execute a feed hold with deceleration, only during cycle. Called by main program.
|
||
|
|
void st_feed_hold()
|
||
|
|
{
|
||
|
|
if (sys.state == STATE_CYCLE) {
|
||
|
|
sys.state = STATE_HOLD;
|
||
|
|
sys.auto_start = false; // Disable planner auto start upon feed hold.
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
// Reinitializes the cycle plan and stepper system after a feed hold for a resume. Called by
|
||
|
|
// runtime command execution in the main program, ensuring that the planner re-plans safely.
|
||
|
|
// NOTE: Bresenham algorithm variables are still maintained through both the planner and stepper
|
||
|
|
// cycle reinitializations. The stepper path should continue exactly as if nothing has happened.
|
||
|
|
// Only the planner de/ac-celerations profiles and stepper rates have been updated.
|
||
|
|
void st_cycle_reinitialize()
|
||
|
|
{
|
||
|
|
if (current_block != NULL) {
|
||
|
|
// Replan buffer from the feed hold stop location.
|
||
|
|
plan_cycle_reinitialize(st.step_events_remaining);
|
||
|
|
st.ramp_type = ACCEL_RAMP;
|
||
|
|
st.ramp_count = ISR_TICKS_PER_ACCELERATION_TICK/2;
|
||
|
|
st.delta_d = 0;
|
||
|
|
sys.state = STATE_QUEUED;
|
||
|
|
} else {
|
||
|
|
sys.state = STATE_IDLE;
|
||
|
|
}
|
||
|
|
}
|