149 lines
4.2 KiB
C
149 lines
4.2 KiB
C
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/*
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LPCUSB, an USB device driver for LPC microcontrollers
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Copyright (C) 2006 Bertrik Sikken (bertrik@sikken.nl)
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. The name of the author may not be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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Hardware definitions for the LPC176x USB controller
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These are private to the usbhw module
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*/
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// CodeRed - pull in defines from NXP header file
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#include "LPC17xx.h"
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// CodeRed - these registers have been renamed on LPC176x
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#define USBReEP USBReEp
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#define OTG_CLK_CTRL USBClkCtrl
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#define OTG_CLK_STAT USBClkSt
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/* USBIntSt bits */
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#define USB_INT_REQ_LP (1<<0)
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#define USB_INT_REQ_HP (1<<1)
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#define USB_INT_REQ_DMA (1<<2)
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#define USB_need_clock (1<<8)
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#define EN_USB_BITS (1<<31)
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/* USBDevInt... bits */
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#define FRAME (1<<0)
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#define EP_FAST (1<<1)
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#define EP_SLOW (1<<2)
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#define DEV_STAT (1<<3)
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#define CCEMTY (1<<4)
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#define CDFULL (1<<5)
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#define RxENDPKT (1<<6)
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#define TxENDPKT (1<<7)
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#define EP_RLZED (1<<8)
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#define ERR_INT (1<<9)
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/* USBRxPLen bits */
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#define PKT_LNGTH (1<<0)
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#define PKT_LNGTH_MASK 0x3FF
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#define DV (1<<10)
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#define PKT_RDY (1<<11)
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/* USBCtrl bits */
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#define RD_EN (1<<0)
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#define WR_EN (1<<1)
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#define LOG_ENDPOINT (1<<2)
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/* protocol engine command codes */
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/* device commands */
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#define CMD_DEV_SET_ADDRESS 0xD0
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#define CMD_DEV_CONFIG 0xD8
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#define CMD_DEV_SET_MODE 0xF3
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#define CMD_DEV_READ_CUR_FRAME_NR 0xF5
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#define CMD_DEV_READ_TEST_REG 0xFD
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#define CMD_DEV_STATUS 0xFE /* read/write */
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#define CMD_DEV_GET_ERROR_CODE 0xFF
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#define CMD_DEV_READ_ERROR_STATUS 0xFB
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/* endpoint commands */
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#define CMD_EP_SELECT 0x00
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#define CMD_EP_SELECT_CLEAR 0x40
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#define CMD_EP_SET_STATUS 0x40
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#define CMD_EP_CLEAR_BUFFER 0xF2
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#define CMD_EP_VALIDATE_BUFFER 0xFA
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/* set address command */
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#define DEV_ADDR (1<<0)
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#define DEV_EN (1<<7)
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/* configure device command */
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#define CONF_DEVICE (1<<0)
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/* set mode command */
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#define AP_CLK (1<<0)
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#define INAK_CI (1<<1)
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#define INAK_CO (1<<2)
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#define INAK_II (1<<3)
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#define INAK_IO (1<<4)
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#define INAK_BI (1<<5)
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#define INAK_BO (1<<6)
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/* set get device status command */
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#define CON (1<<0)
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#define CON_CH (1<<1)
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#define SUS (1<<2)
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#define SUS_CH (1<<3)
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#define RST (1<<4)
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/* get error code command */
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// ...
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/* Select Endpoint command read bits */
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#define EPSTAT_FE (1<<0)
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#define EPSTAT_ST (1<<1)
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#define EPSTAT_STP (1<<2)
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#define EPSTAT_PO (1<<3)
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#define EPSTAT_EPN (1<<4)
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#define EPSTAT_B1FULL (1<<5)
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#define EPSTAT_B2FULL (1<<6)
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/* CMD_EP_SET_STATUS command */
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#define EP_ST (1<<0)
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#define EP_DA (1<<5)
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#define EP_RF_MO (1<<6)
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#define EP_CND_ST (1<<7)
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/* read error status command */
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#define PID_ERR (1<<0)
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#define UEPKT (1<<1)
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#define DCRC (1<<2)
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#define TIMEOUT (1<<3)
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#define EOP (1<<4)
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#define B_OVRN (1<<5)
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#define BTSTF (1<<6)
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#define TGL_ERR (1<<7)
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